ML620Q503/Q504 User's Manual
Chapter 4 Power Management
FEUL620Q504 4-7
4.2.5 Block Control Register 23 (BLKCON23)
Address: 0F06AH
Access: R/W
Access size: 8/16 bit
Initial value: 0000H
7
6
5
4
3
2
1
0
BLKCON2
DI2C1
DI2C0
–
DUAF0
DUA1
DUA0
DSIOF0
DSIO0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
BLKCON3
DCMP1
DCMP0
–
–
–
–
–
DMD0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
BLKCON23 is a special function register (SFR) to control each block operation.
Description of Bits
•
DSIO0
(bit 0)
The DSIO0 bit is used to control the operation of the synchronous serial port operation.
DSIO0
Description
0
Enable operating the synchronous serial port 0 (initial value)
1
Disable operating the synchronous serial port 0
•
DSIOF0
(bit 1)
The DSIOF0 bit is used to control the operation of the synchronous serial port operation with FIFO.
DSIOF0
Description
0
Enable operating the synchronous serial port 0 with FIFO (initial value)
1
Disable operating the synchronous serial port 0 with FIFO
•
DUA1-0
(bits 3 to 2)
The DUA1-0 bits are used to control the UART0 operation.
DUA1
DUA0
Description
0
0
Enable operating UART0 (initial value)
0
1
Setting prohibited
1
0
Setting prohibited
1
1
Disable operating UART0
•
DUAF0
(bit 4)
The DUAF0 bit is used to control the operation of UART with FIFO.
DUAF0
Description
0
Enable operating UART with FIFO (initial value)
1
Disable operating UART with FIFO
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...