Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 14 UART with FIFO(UARTF)
FEUL620Q504 14-7
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UF0IRID2-0 (bits 3 to 1)
UF0IRID2-0 indicate the interrupt source of the UARTF0 interrupt.
LVL=1 is the highest priority. The highest-priority interrupt source is notified.
UF0IRID
2 to 0
LVL Flag Source Reset Process
000 – – No interrupt source (initial value) –
011 1 Received data
error Overrun error, parity error,
framing error, break interrupt
Read UAF0LSR
010 2 Received data
read request FIFO disabled:
The received data is available.
FIFO enabled:
Reached the Trigger level
Read RBR,
or when FIFO
drops below trigger
level
110 2 Character
timeout At least one character is present in
the receive FIFO, and no other
character was placed into or read out
within 4 character time. Read RBR
001 3 Transmitted
data write
request FIFO disabled:
THR write enabled.
FIFO enabled:
The transmit FIFO data becomes
empty.
Read UAF0IIR or
write THR
•
UF0FMD1-0 (bits 7 to 6)
UF0FMD1-0 indicate the FIFO mode.
UF0FMD1 UF0FMD0 Description
0 0 Non-FIFO mode (initial value)
0 1 Unused
1 0 Unused
1 1 FIFO mode
[Note]
These interrupt status may be hot before use. Therefore be setting ports then be clear all of these interrupt
status and enable these interrupt.