ML620Q503/Q504 User's Manual
Chapter 9 Function Timer(FTM)
FEUL620Q504 9–20
•
FTnCST
(bit 3)
Selects the operation mode of starting the counter by trigger event.
FTnMD
FTnCST
Description
TIMER
CAPTURE
PWM1/2
0
A trigger event always starts the counter when it is stopped (except
for emergency stop) (initial value)
1
A trigger event does not start the counter before FTnC is read when
it is stopped (except for emergency stop)
•
FTnSTSS, FTnSTS3-0
(bits 15, 11 to 8)
Selects the source of the trigger event for FTMn. Do not select itself, for example, FTM0 for the FTM0
setting.
FTnMD
FTnSTS*
Description
S
3
2
1
0
TIMER
CAPTURE
PWM1/2
0
0
0
0
0
EXI0TGO (initial value)
0
0
0
0
1
EXI1TGO
0
0
0
1
0
EXI2TGO
0
0
0
1
1
EXI3TGO
0
0
1
0
0
EXI4TGO
0
0
1
0
1
EXI5TGO
0
0
1
1
0
EXI6TGO
0
0
1
1
1
EXI7TGO
1
0
0
0
0
TM0INT
1
0
0
0
1
TM1INT
1
0
0
1
0
TM2INT
1
0
0
1
1
TM3INT
1
0
1
0
0
TM4INT
1
0
1
0
1
TM5INT
1
0
1
1
0
TM6INT
1
0
1
1
1
TM7INT
1
1
0
0
0
FTM0TGO
1
1
0
0
1
FTM1TGO
1
1
0
1
0
FTM2TGO
1
1
0
1
1
FTM3TGO
others
Reserved
[Note]
EXInTGO is the trigger signal from external terminals.
The timer interrupt request (TMnINT) is an interrupt request signal independent of the interrupt
enabled/disabled setting of the interrupt enable register.
FTM trigger output(FTMnTGO) is used only for event trigger.
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...