Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 27 Flash Memory Control
FEUL620Q504 27- 4
27.2.3 Flash Data Register (FLASHD)
Address: 0F0E2H
Access: R/W
Access size: 8/16 bit
Initial value: 0000H
7 6 5 4 3 2 1 0
FLASHDL FD7 FD6 FD5 FD4 FD3 FD2 FD1 FD0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
FLASHDH FD15 FD14 FD13 FD12 FD11 FD10 FD9 FD8
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
FLASHD is a special function register (SFR) used to set the flash memory rewrite data.
Description of Bits
•
FD7-0 (bits 7 to 0)
The FD7 to FD0 bits are used to set the lower data for 1-word write.
•
FD15-8 (bits 15 to 8)
The FD15 to FD8 bits are used to set the upper data for 1-word write.
Writing to the FD15 to FD8 bits starts the 1-word write.
[Note]
Clear the contents of the target addresses in advance. The content of an overwritten address is not guaranteed.
For byte access, write data to FLASHDL and FLASHDH in this order, because writing to FLASHDH starts
the 1-word write.