ML620Q503/Q504 User’s Manual
Chapter 1 Overview
FEUL620Q504 1–6
1.3 Pins
1.3.1 Pin Layout
1.3.1.1 Pin Layout of ML620Q503/Q504 TQFP Package
External interrupt inputpin(EXI) can be assigned to P00-P05, PXT0-1, P20-P57.
*0 to *7 and *0$ to *7$ has following functions. But 0$-7$ has limited function. Please refer to the pin list.
*0 : SDA0, SOUT0, RXD0
*4 : SDA1, SOUTF0, RXDF0
*1 : SCL0, SIN0 , TXD0
*5 : SCL1, SINF0, TXDF0
*2 : SCK0, TMOUT ,TMCKI
*6 : LSCLKO,SCKF0, TMOUT, TMCKI
*3 : MD0, TMOUT , TMCKI
*7 : OUTCLK,SSF0, TMOUT, TMCKI
*0$ : SOUT0, RXD0
*4$ : SOUTF0, RXDF0
*1$ : SIN0, TXD0
*5$ : SINF0, TXDF0
*2$ : SCK0, TMOUT
*6$ : SCKF0, TMOUT
*3$ : MD0(P33 only), TMOUT
*7$ : SSF0, TMOUT
Figure 1-2 Pin Layout of ML620Q503/Q504 TQFP Package
12
1
2
3
4
5
6
7
8
9
10
11
25
26
27
28
29
30
31
32
33
34
35
36
24
23
22
21
20
19
18
17
16
15
14
13
38
39
40
41
42
43
44
45
46
47
48
37
O
S
C
0
|
P
1
0
CL
K
IN
|
O
S
C1
|
P
1
1
R
ESET
_
N
*0 |
C
M
P
0P
|
P
30
*1
| C
MP
0
M | P
3
1
*2
$
| C
MP
1
P
| P
3
2
*3
$
|
CM
P
1
M
|
P3
3
*4 |
A
IN
0 |
P
34
*5 |
A
IN
1 |
P
35
*6
$
|
AI
N
2
|
P3
6
*7
$
|
AI
N
3
|
P3
7
V
R
EF
P05 | RCM
P04 | RT0
P03 | AIN11 | RS0 | *3$
P02 | AIN10 | RCT0 | *2$
P01 | AIN9 | CS0 | *1$
P00 | AIN8 | IN0 | *0$
P23 | AIN7 | RT1 | *7$
P22 | AIN6 | RS1 | *6$
P21 | AIN5 | CS1 | *5$
P20 | AIN4 | IN1 | *4$
V
SS
V
DD
P
40 |
L
E
D |
*0
P
41 |
L
E
D |
*1
P
42 |
*
2
P
43 |
*
3
P
44 |
*
4
P
45 |
*
5
P
46 |
*
6
P
47 |
*
7
P
50 |
*
0
P
51 |
*
1
P
52 |
L
E
D |
*2
P
53 |
L
E
D |
*3
*4 | P54
*5 | P55
*6 | P56
*7 | P57
TEST0
TEST1_N
V
DDL
V
DD
V
SS
V
DDX
LSCLKI | XT1 | PXT1
XT0 | PXT0
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...