Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User’s Manual
Chapter 8 Timers
FEUL620Q504 8–6
8.2.4 Timer nm Control Register (TMnmCON : {n,m}={0,1}, {2,3}, {4,5}, {6,7})
Address: 0F320H(TM0CON/TM01CON), 0F321H(TM1CON), 0F322H(TM2CON/TM23CON), 0F323H(TM3CON),
0F324H(TM4CON/TM45CON), 0F325H(TM5CON), 0F326H(TM6CON/TM67CON), 0F327H(TM7CON)
Access: R/W
Access size: 8/16 bits
Initial value: 0000H
7 6 5 4 3 2 1 0
TMnCON TnOST TmM16 TnDIV2 TnDIV1 TnDIV0 – TnCS1 TnCS0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
TMmCON TmOST – TmDIV2 TmDIV1 TmDIV0 – TmCS1 TmCS0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
n=0 to 7, m= 01, 23, 45, 67
* TnCS1 bit of TM0CON and TM1CON is fixed as “0”.
** TM1CON, TM3CON, TM5CON, and TM7CON has no TmM16.
TMnCON is a special function (SFR) register to control a timer.
Timer control register(TMnCON) is a special function register(SFR) which control timer.
Timer control register setting need to be done while target timer is stop(TMSTAT0 register TnSTAT state is “0”)
TM0CON and TM1CON are accesable as 16bit TM01CON.
TM2CON and TM3CON are accesable as 16bit TM23CON.
TM4CON and TM5CON are accesable as 16bit TM45CON.
TM6CON and TM7CON are accesable as 16bit TM67CON.
Description of Bits
•
TnCS1-0 (bit 1 to 0), TmCS1-0 (bit 9 to 8)
The TnCS1-0(TmCS1-0) bits are used for selecting the operation clock of timer n(timer m). The clock assigned by
TM0CON, TM2CON, TM4CON, and TM6CON is used as the operation clock at 16bit timer mode.
TnCS1
TmCS1
TnCS0
TmCS0
Description
Timer 7,6 Timer 5 Timer 4 Timer 3 Timer 2 Timer 1,0
0 0 LSCLK (initial value)
0 1 OSCLK
1 0
Low-speed
oscillation
clock
LSCLK Prohibited
1 1 LSCLK
External
clock (P53)
External
clock(P52)
External
clock (P43)
External
clock (P42)
Prohibited