Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 5 Interrupts
FEUL620Q504 5–61
5.3.8 Interrupt Disable State
Even if the interrupt conditions are satisfied, an interrupt may not be accepted depending on the operating state.
This is called an interrupt disabled state. See below for the interrupt disabled state and the handling of interrupts
in this state.
Interrupt disabled state 1: Between the interrupt shift cycle and the instruction at the beginning of the
interrupt routine
When the interrupt conditions are satisfied in this interval, an interrupt is generated immediately
following the execution of the instruction at the beginning of the interrupt routine corresponding to
the interrupt that has already been enabled.
Interrupt disabled state 2: Between the DSR prefix instruction and the next instruction
When the interrupt conditions are satisfied in this interval, an interrupt is generated immediately after
execution of the instruction following the DSR prefix instruction.
For the DSR prefix instruction, see "nX-U16/100 Core Instruction Manual".