Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User’s Manual
Contents
FEUL620Q504 contents–2
Chapter 4
4. Power Management.......................................................................................................................... 4-1
4.1 General Description
.....................................................................................................................
4-1
4.1.1 Features ...................................................................................................................... 4-1
4.1.2 Configuration ............................................................................................................... 4-1
4.2 Description of Registers ................................................................................................................ 4-2
4.2.1 Register Configuration List ......................................................................................... 4-2
4.2.2 Stop Code Acceptor (STPACP) .................................................................................. 4-3
4.2.3 Standby Control Register (SBYCON) ......................................................................... 4-4
4.2.4 Block Control Register 01 (BLKCON01) .................................................................... 4-5
4.2.5 Block Control Register 23 (BLKCON23) .................................................................... 4-7
4.2.6 Block Control Register 45 (BLKCON45) .................................................................... 4-9
4.3
Description of Operation
............................................................................................................. 4-11
4.3.1 HALT Mode ............................................................................................................... 4-11
4.3.1.1 HALT Mode .......................................................................................................... 4-11
4.3.1.2 DEEP-HALT Mode ............................................................................................. 4-12
4.3.1.3
HALT-H Mode
..................................................................................................... 4-13
4.3.2 STOP Mode .............................................................................................................. 4-14
4.3.2.1 Oscillation Stop and Restart Timing of Low-Speed Clock ................................... 4-14
4.3.2.2 Oscillation Stop and Restart Timing of High-Speed Clock ................................... 4-15
4.3.2.3 Note on Return Operation from STOP/HALT/DEEP-HALT/HALT-H Mode .......... 4-17
4.3.3 Operation of Functions in STOP/HALT/DEEP-HALT/HALT-H Mode ...................... 4-18
4.3.4 Block Control Function .............................................................................................. 4-19
Chapter 5
5. Interrupts ........................................................................................................................................... 5-1
5.1 General Description
.................................................................................................................... 5-1
5.1.1 Features ......................................................................................................................... 5-1
5.1.2 Configuration ................................................................................................................. 5-2
5.2 Description of Registers ............................................................................................................. 5-3
5.2.1 List of Registers .......................................................................................................... 5-3
5.2.2 Interrupt Enable Register 01 (IE01) ............................................................................ 5-5
5.2.3 Interrupt Enable Register 23 (IE23) ............................................................................ 5-7
5.2.4 Interrupt Enable Register 45 (IE45) ............................................................................ 5-9
5.2.5 Interrupt Enable Register 67 (IE67) .......................................................................... 5-11
5.2.6 Interrupt Request Register 01 (IRQ01) .................................................................... 5-13
5.2.7 Interrupt Request Register 23 (IRQ23) .................................................................... 5-16
5.2.8 Interrupt Request Register 45 (IRQ45) .................................................................... 5-19
5.2.9 Interrupt Request Register 67 (IRQ67) .................................................................... 5-22
5.2.10 Interrupt Level Control Enable Register (ILEN) ...................................................... 5-24
5.2.11 Current Interrupt Request Level Register (CIL)...................................................... 5-25
5.2.12 Interrupt Level Control Register 1 (ILC1) ............................................................... 5-27
5.2.13 Interrupt Level Control Register 2 (ILC2) ............................................................... 5-29
5.2.14 Interrupt Level Control Register 3 (ILC3) ............................................................... 5-31
5.2.15 Interrupt Level Control Register 4 (ILC4) ............................................................... 5-33
5.2.16 Interrupt Level Control Register 5 (ILC5) ............................................................... 5-35
5.2.17 Interrupt Level Control Register 6 (ILC6) ............................................................... 5-37
5.2.18 Interrupt Level Control Register 7 (ILC7) ............................................................... 5-39
5.2.19 External Interrupt Control Registers 01 (EXICON01) ............................................. 5-41
5.2.20 External Interrupt Control Registers 23 (EXICON23) ............................................. 5-42
5.2.21 External Interrupt 0/1 Selection Register (EXI01SEL) ........................................... 5-43
5.2.22 External Interrupt 2/3 Selection Register (EXI23SEL) ........................................... 5-45
5.2.23 External Interrupt 4/5 Selection Register (EXI45SEL) ........................................... 5-47
5.2.24 External Interrupt 6/7 Selection Register (EXI67SEL) ........................................... 5-49