Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 5 Interrupts
FEUL620Q504 5–62
5.3.9 External Interrupt
When an interrupt edge selected with the external interrupt control register 0/1 (EXICON01) occurs at one of
external interrupts EXI0 to 7, any of the maskable EXI0 to EXI7 interrupts (EXI0INT to EXI7INT) occurs.
It is possible to set the external interrupt control register 2/3 (EXICON23) to perform the filtering with noise
filtering and/or sampling (2
φ
sampling with T16KHZ that is 2 dividing of LSCLK) for an external pin input.
But the signal for the trigger of FTM is filtered by noise filter/not sampling without relation for control of
EXICON23.
Figure 5-2 shows the interrupt generation timing in rising-edge interrupt mode, in falling-edge interrupt mode,
and in both-edge interrupt mode without sampling, and in rising-edge interrupt mode with sampling.
(a) When Falling-Edge Interrupt Mode without Sampling is Selected
(b) When Rising-Edge Interrupt Mode without Sampling is Selected
(c) When Both-Edge Interrupt Mode without Sampling is Selected
PXT0
PXT1
:
:
P56
P57
Noise
Filter
Sampling
Controller
EXI*
EXI[7:0]TGO
EXICON3
EXICON2 EXI*SEL
Edge
Selector
EXICON01
SYSCLK
EXIn
EXIxINT
n = 0 to 7
SYSCLK
EXIn
EXInINT
n = 0 to 7
SYSCLK
EXIn
EXInINT
Interrupt request
QEXIn
n = 0 to 7
Interrupt request
QEXIn
Interrupt request
QEXIn