Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 9 Function Timer(FTM)
FEUL620Q504 9–21
9.2.12 FTMn Trigger Register 1 (FTnTRG1 : n=0,1,2,3)
Address: 0F412H(FT0TRG1L/FT0TRG1), 0F413H(FT0TRG1H),
0F432H(FT1TRG1L/FT1TRG1), 0F433H(FT1TRG1H),
0F452H(FT2TRG1L/FT2TRG1), 0F453H(FT2TRG1H),
0F472H(FT3TRG1L/FT3TRG1), 0F473H(FT3TRG1H)
Access: R/W
Access size: 8/16 bit
Initial value: 0000H
7 6 5 4 3 2 1 0
FTnTRG1L – – FTnEST1 FTnEST0 – – FTnTRM1 FTnTRM0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
FTnTRG1H – – – – – – – –
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
FTnTRG1 is a special function register (SFR) used to set the function of FTMn.
Description of Bits
•
FTnTRM1-0 (bits 1 to 0)
Selects the edge of the trigger event for FTMn.
It is enabled only when EXI0-7 is selected as the event trigger source. Otherwise, it is fixed to the
rising edge.
FTnMD FTnTRM1-0 Description
Counter start Counter stop/clear
TIMER
CAPTURE
PWM1/2
0 0 Rising edge Rising edge (initial value)
0 1 Falling edge Rising edge
1 0 Rising edge Falling edge
1 1 Falling edge Falling edge
•
FTnEST1-0 (bits 5 to 4)
Selects the emergency stop trigger source of FTMn. This bit is effective only when FTnEMGEN is 1.
FTnMD FTnEST Description
TIMER
CAPTURE
PWM1/2
0 Rising edge of EXI0TGO (initial value)
1 Rising edge of EXI4TGO
2 CMP0TGO
3 CMP1TGO
[Note]
EXInTGO is the trigger signal from external terminals.
CMP0TGO,CMP1TGO is signal for trigger of the comparator.