ML620Q503/Q504 User's Manual
Chapter 6 Clock Generation Circuit
FEUL620Q504
6–9
6.2.3 Frequency Control Register 23(FCON23)
Address: 0F004H
Access: R/W
Access size: 8/16 bits
Initial Value: 0002H
7
6
5
4
3
2
1
0
FCON2
HFLTSEL
HFLTSEL
–
LFLTSEL
–
–
XTM1
XTM0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
1
0
15
14
13
12
11
10
9
8
FCON3
–
–
–
–
–
–
–
–
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2).msg
Initial value
0
0
0
0
0
0
0
0
FCON23 is a special function register (SFR) used to select the clock for the low-speed clock generation circuit.
Description of Bits
•
XTM1-0
(bits 1 to 0)
The XTM1-0 bits are used to select the low-speed clock mode. Low-speed Crystal/ceramic oscillation
mode, low-speed built-in RC oscillation mode, or low-speed external clock input mode can be selected.
At system reset, the built-in low-speed RC oscillation mode is selected.
XTM1
XTM0
Description
0
0
Setting prohibited (the setting is ignored and the previous value is held)
0
1
Low-speed Crystal oscillation mode
1
0
Low-speed Built-in RC oscillation mode (initial value)
1
1
External low-speed clock input mode
[Note]
When switching the clock mode from the external low-speed clock input mode to a the low-speed crystal
oscillation mode, set the clock mode to the low-speed crystal oscillation mode after setting the clock mode
in low-speed built-in RC oscillation mode.
Also when switching the clock mode from the low-speed crystal oscillation mode to the low-speed external
clock input mode, set the clock mode to the external low-speed clock input mode after setting the clock
mode in low-speed build in RC oscillation mode.
If low-speed built-in RC oscillation mode is not set before setting low-speed crystal oscillation mode or
external low-speed clock input mode, these functions cannot be guaranteed.
•
LFLTSEL
(
bit 4
)
LFLTSEL bit is used to select noise filter on/off at low-speed crystal/ceramic oscillation or external
low-speed clock input mode.
LFLTSEL
Description
0
Low speed clock noise filter is off (initial value)
1
Low speed clock noise filter is on
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...