ML620Q503/Q504 User's Manual
Chapter 25 Successive Approximation Type A/D Converter
FEUL620Q504 25-4
25.2.2 SA-ADC Result Register n (SADRn) n=0 to 9, A, B
Address: 0F820H(SADR0L/SADR0), 0F821H(SADR0H), 0F822H(SADR1L/SADR1), 0F823H(SADR1H),
0F824H(SADR2L/SADR2), 0F825H(SADR2H), 0F826H(SADR3L/SADR3), 0F827H(SADR3H),
0F828H(SADR4L/SADR4), 0F829H(SADR4H), 0F82AH(SADR5L/SADR5), 0F82BH(SADR5H),
0F82CH(SADR6L/SADR6), 0F82DH(SADR6H), 0F82EH(SADR7L/SADR7), 0F82FH(SADR7H),
0F830H(SADR8L/SADR8), 0F831H(SADR8H), 0F832H(SADR9L/SADR9), 0F833H(SADR9H),
0F834H(SADRAL/SADRA), 0F835H(SADRAH), 0F836H (SADRBL/SADRB), 0F837H (SADRBH)
Access: R
Access size: 8/16 bits
Initial value: 0000H
7
6
5
4
3
2
1
0
SADRnL
SARn7
SARn6
SARn5
SARn4
SARn3
SARn2
SARn1
SARn0
R/W
R
R
R
R
R
R
R
R
Initial value
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
SADRnH
–
–
–
–
SARnB
SARnA
SARn9
SARn8
R/W
R
R
R
R
R
R
R
R
Initial value
0
0
0
0
0
0
0
0
n = 0 to 9, A, B
SADRn is a special function register (SFR) used to store SA-ADC conversion results on channel n.
SADRn is updated after A/D conversion.
Description of Bits
•
SARnB-0
(bits 11 to 0)
Stores the A/D conversion result (12 bits) of the channel n.
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...