Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User’s Manual
Chapter 8 Timers
FEUL620Q504 8–4
8.2.2 Timer n Data Register (TMnmD : {n,m}={0,1} , {2,3} , {4,5} , {6,7})
Address: 0F300H(TM0D/TM01D), 0F301H(TM1D), 0F302H(TM2D/TM23D), 0F303H(TM3D),
0F304H(TM4D/TM45D), 0F305H(TM5D), 0F306H(TM6D/TM67D), 0F307H(TM7D)
Access: R/W
Access size: 8/16 bits
Initial value: FFFFH
7 6 5 4 3 2 1 0
TMnD TnD7 TnD6 TnD5 TnD4 TnD3 TnD2 TnD1 TnD0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 1 1 1 1 1 1 1 1
15 14 13 12 11 10 9 8
TMmD TmD7 TmD6 TmD5 TmD4 TmD3 TmD2 TmD1 TmD0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 1 1 1 1 1 1 1 1
TMnD is a special function register (SFR) to set the value to be compared with the timer n counter register (TMnC)
value.
[Note]
Set TMnD when the timer stops.
When “00H” is written in TMnD, TMnD is set to “01H” (8bit mode case ).
When “0000H” is written in TMnD, TMnD is set to “0001H” (16bit mode case ).