ML620Q503/Q504 User's Manual
Chapter 25 Successive Approximation Type A/D Converter
FEUL620Q504 25-7
25.2.4 SA-ADC Control Register1 (SADCON1)
Address: 0F841H
Access: R/W
Access size: 8 bits
Initial value: 00H
7
6
5
4
3
2
1
0
SADCON1
–
–
–
–
–
–
–
SARUN
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
SADCON is a special function register (SFR) used to control the operation of the SA-ADC.
Description of Bits
•
SARUN
(bit 0)
This bit is used to start or stop the SA-ADC conversion. Set this bit to "1" to start the A/D conversion,
and "0" to stop it.
When SALP is “0” and then A/D conversion on the channel with the largest channel number among the
selected ones is terminated, the SARUN bit is automatically set to “0”. In the case of a trigger mode, the
control by the software isn’t possible. This bit is set to “1” when the A/D conversion starts by the trigger
event, and when conversion is finished, it becomes “0”.
In addition, don’t start A/D conversion in a state with all bits of SA-ADC enable register (SADEN) as
“0”. If the A/D conversion is started in this state, the A/D conversion circuit does not work.
SARUN
Description
0
Stops conversion (initial value)
1
Starts conversion
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...