ML620Q503/Q504 User’s Manual
Chapter 17 Port 0
FEUL620Q504 17–1
17 Port 0
17.1 Overview
This LSI includes Port 0 (P00 to P05), which is a 6-bit input/output port.
These ports can also be used as the SA-ADC, RC-ADC, SSIO, UART, FTM output pins.
See the following chapters for reference:
FTM:
Chapter 9 “Function Timer”
SSIO: Chapter 11“Synchronous Serial Port”
UART: Chapter 13“UART”
SA-ADC:
Chapter 25 “Successive approximate type A/D converter”
RC-ADC:
Chapter 24 “RC Oscillation Type A/D Converter”
17.1.1 Features
•
Allows selection of high-impedance output, P-channel open drain output, N-channel open drain output, or CMOS
output in output mode for each bit.
•
Allows selection of high-impedance input, input with a pull-down resistor, or input with a pull-up resistor in input
mode for each bit.
•
External interrupt inputs(EXI00,EXI01,EXI02,EXI03,EXI04,EXI05), the SA-ADC input pins (AIN8, AIN9, AIN10,
AIN11), The RC-ADC (channel 0) oscillation pins (IN0, CS0, RS0, RT0, RCT0, RCM), the SSIO pins (SCK0,
SOUT0, SIN0), the UART pins ( TXD0, RXD0 ), FTM output pin (TMOUT0, TMOUT1) can be used as the
secondary or tertiary or fouthly functions.
17.1.2 Configuration
Figure 17-1 shows the configuration of Port 0.
P0D
: Port 0 data register
P0DIR
: Port 0 direction register
P0CON
: Port 0 control register
P0MOD
: Port 0 mode register
Figure 17-1 Configuration of Port 0
Data bus
Outputs for RC-ADC
(CS0, RS0, RT0, RCT0, RCM)
Output for FTM
(TMOUT0/1)
Output for SSIO
(SCK0,SOUT0)
Output for UART(TXD0)
P00 to P05
P0DIR
P0MOD
P0CON
V
DD
V
DD
V
SS
V
SS
6
10
Port0
Output
Controller
P0D
V
DD
V
SS
Pull-up
Pull-down
Controller
Input for RC-ADC(IN0)
Input for SSIO(SIN0)
Input for UART(RXD0)
3
6
Input for SA-ADC
(AIN8-AIN11)
4
6
EXI00 to EXI05
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...