Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

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ML620Q503/Q504 User's Manual
Chapter 6 Clock Generation Circuit
FEUL620Q504 6–14
6.3.1.4 Low-Speed Built-In RC Oscillation Mode Operation
The low-speed built-in RC oscillation mode starts by the occurrence of power ON reset.
After power-on, the built-in RC oscillation clock is counted to 128 as the low-speed clock, then the built-in RC
oscillation clock (LSCLK) is supplied to the peripheral circuits.
The RC low-speed clock generation circuit stops oscillation when it shifts to the STOP mode by software. It
restart oscillation when the stop mode is released by an external interrupt. The built-in RC oscillation clock is
counted to 29 as the low-speed clock, then the built-in RC oscillation clock (LSCLK) is supplied to the
peripheral circuits. For STOP mode, see Chapter 4, "Power Management".
Figure 6-6 shows the operation waveforms of the low-speed clock generation circuit in the built-in RC oscillation
mode.
Figure 6-6 Low-Speed Clock Generation Circuit Operation (Built-In RC Oscillation Mode)
V
DD
RESET
External interrupt occurred
LSCLK
Built-in RC oscillation
STOP
mode
Built-in RC oscillation Built-in RC oscillation
Built-in RC oscillation
Built-in RC oscillation
LOSCS bit
RC oscillation counted to 128
RC oscillation counted to 29
SYSCLK
High-speed clock
CPU started
same as before stop
CPU started
"H"
RC oscillation counted to 130