ML620Q503/Q504 User's Manual
Chapter 15 I
2
C Bus Interface
FEUL620Q504 15–13
15.3.2 Communication Operation Timing
Figures 15-2 to 15-4 show the operation timing and control method for each communication mode.
Figure 15-2 Operation Timing in Data Transmit Mode (Write)
Figure 15-3 Operation Timing in Data Receive Mode (Read)
Figure 15-4 Operation Timing at Data Transmit/Receive Mode (Write/Read) Switching
S
P
S
r
TX
RX
Start
condition
Stop
condition
Restart
condition
Reception of
acknowledg
ment
Transmission
of
acknowledgment
A
A
A
I2CnSA=”xxxxxxx0B”
I2CnCON=”01H”
I2CnTD=”xxH”
I2CnCON=”01H”
I2CnTD=”xxH”
I2CnCON=”01H”
I2CnTD=”xxH”
I2CnCON=”01H”
Value of
I2CnTD
S
A
6
A
5
A
4
A
3
A
2
A
1
A
0
R
W
A
D
6
D
0
D
7
A
D
6
D
7
D
0
A
D
6
D
7
D
0
A
P
I2CnCON=”02H”
Value of
I2CnnTD
Value of
I2CnTD
Value of I2CnSA
Value of
I2CnSA
Value of
I2CnTD
Value of
I2CnTD
Value of
I2CnTD
Register
setting
SDA
I2CMINT
I2nST
I2CnRD
I2CnSA=”xxxxxxx0B”
I2CnCON=”01H”
I2CnTD=”xxH”
I2CnCON=”01H”
S
A
6
A
5
A
0
R
W
A
D
6
D
0
D
7
A
P
I2CnCON=”02H”
Value of
I2CnTD
Value of
I2CnSA
Value of I2CnSA
Value of I2CnTD
Value of I2CnSA
Receive data
Register
setting
SDA
I2CMINT
I2nST
I2CnRD
I2CnSA=”xxxxxxx1B”
I2CnCON=”05H”
I2CnCON=”81H”
A
6
A
5
A
0
R
W
A
D
6
D
0
D
7
A
Receive
data
Value of I2CnSA
S
r
I2CnSA=”xxxxxxx1B”
I2CnCON=”01H”
I2CnCON=”01H”
I2CnCON=”01H”
I2CnCON=”81H”
Receive
data
S
A
6
A
5
A
4
A
3
A
2
A
1
A
0
R
W
A
D
6
D
0
D
7
A
D
6
D
7
D
0
A
D
6
D
7
D
0
A
P
I2CnCON=”02H”
Receive
data
Receive
data
Value of I2CnSA
Value of I2CnSA
Receive data
Receive data
Receive data
Register
setting
SDA
I2CMINT
I2nST
I2CnRD
Transmission of
Non-
acknowledgment
Summary of Contents for LAPIS SEMICONDUCTOR ML620Q503
Page 2: ...ML620Q503 Q504 User s Manual Issue Date Apr 16 2015 FEUL620Q504 01...
Page 18: ...Chapter 1 Overview...
Page 32: ...Chapter 2 CPU and Memory Space...
Page 44: ...Chapter 3 Reset Function...
Page 50: ...Chapter 4 Power Management...
Page 70: ...Chapter 5 Interrupts...
Page 134: ...Chapter 6 Clock Generation Circuit...
Page 161: ...Chapter 7 Time Base Counter...
Page 170: ...Chapter 8 Timers...
Page 183: ...Chapter 9 Function Timer FTM...
Page 231: ...Chapter 10 Watchdog Timer...
Page 239: ...Chapter 11 Synchronous Serial Port SSIO...
Page 251: ...Chapter 12 Synchronous Serial Port with FIFO SSIOF...
Page 283: ...Chapter 13 UART...
Page 303: ...Chapter 14 UART with FIFO UARTF...
Page 327: ...Chapter 15 I2 C Bus Interface...
Page 344: ...Chapter 16 Port XT...
Page 350: ...Chapter 17 Port 0...
Page 361: ...Chapter 18 Port 1...
Page 368: ...Chapter 19 Port2...
Page 379: ...Chapter 20 Port 3...
Page 395: ...Chapter 21 Port 4...
Page 410: ...Chapter 22 Port 5...
Page 426: ...Chapter 23 Melody Driver...
Page 439: ...Chapter 24 RC Oscillation type A D Converter RC ADC...
Page 462: ...Chapter 25 Successive Approximation Type A D Converter SA ADC...
Page 479: ...Chapter 26 Analog Comparator...
Page 489: ...Chapter 27 Flash Memory Control...
Page 505: ...Chapter 28 Voltage Level Supervisor VLS...
Page 517: ...Chapter 29 LLD circuit...
Page 519: ...Chapter 30 On Chip Debug Function...
Page 522: ...Appendixes...
Page 552: ...Revision History...