Rohm LAPIS SEMICONDUCTOR ML620Q503, User Manual

Page: 480 / 553

ML620Q503/Q504 User’s Manual
Chapter 26 Analog Comparator
FEUL620Q504 26–1
26 Analog Comparator
26.1 Overview
An analog comparator compares 2 input voltage and generate an interrupt corresponding to the comparison result.
This LSI has two channel analog comparator, can compare the voltages (differential input) supplied to two input pins
(CMPnP and CMPnM, n=0, 1).
26.1.1 Features
•
The comparator output can generate an interrupt.
•
Allows selection of falling-edge interrupt mode, rising-edge interrupt mode, or both-edge interrupt mode.
•
Allows selection of with/without interrupt sampling for each bit.(Sampling frequency: T16KHZ,
OSCLK/128(125kHz@OSCLK=16MHz), OSCLK/64(250kHz @ OSCLK=16MHz) )
•
The last status of comparator output (CMPnD) remains after the comparator is deactivated.
•
Single mode is available.
26.1.2 Configuration
Figure 26-1 shows the configuration of the Comparator.
CMPnCON : Comparator control register n
CMPnMOD : Comparator mode register n
n = 0, 1
Figure 26-1 Configuration of Analog Comparator
26.1.3 List of Pins
Pin name I/O Description
P30/CMP0P I Analog comparator 0 non-inverted input pin
P31/CMP0M I Analog comparator 0 inverted input pin
P32/CMP1P I Analog comparator 1 non-inverted input pin
P33/CMP1M I Analog comparator 1 inverted input pin
Interrupt
Controller
CMPnCON
+
-
EN
Comparator
Data BUS
CMPnOUT
CMPnP
Sampling
Controller
CMPnM
CMPnINT
Smapling Clock
(T16KHZ, OSCLK/128, OSCLK/64)
CMPnMOD
Operation
controller
Latch
CMPnD
LSCLK
OSCLK
CMPnTGO