Lattice LatticeMico8, User Manual

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rd1026_01.2
May 2006 Reference Design RD1026
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Introduction
The LatticeMico8™ is an 8-bit microcontroller optimized for Field Programmable Gate Arrays (FPGAs) and Cross-
over Programmable Logic Device architectures from Lattice. Combining a full 18-bit wide instruction set with
32 General Purpose registers, the LatticeMico8 is a flexible Verilog reference design suitable for a wide variety of
markets, including communications, consumer, computer, medical, industrial, and automotive. The core consumes
minimal device resources, less than 200 Look Up Tables (LUTs) in the smallest configuration, while maintaining a
broad feature set.
Features
• 8-bit Data Path
• 18-bit Wide Instructions
• 32 General Purpose Registers
• 32 bytes of Internal Scratch Pad Memory
• Input/Output is Performed Using “Ports” (Up to 256 Port Numbers)
• Optional 256 bytes of External Scratch Pad RAM
• Two Cycles Per Instruction
• Lattice UART Reference Design Peripheral
Functional Description
The following figure shows a block diagram of LatticeMico8 microcontroller.
Figure 1. LatticeMico8 Microcontroller Block Diagram
Optional External
Scratch Pad
( u p to 256 Bytes)
Internal
32-byte Scratch
Pad Memory
Re g ister File
32 8-bit
Re g isters
Pro g ram
Memory
(EBR)
Pro g ram Flow Control and PC
16 Deep Call Stack
Interr u pt Ack
v al u e
ALU Op
From I/O Port
To I/O Port
op A
op B
Fla g s
CY, Z
rd
r b
instr
17:0
Interr u pt
From Mem
Immediate
v al u e
ALU
LatticeMico 8 Microcontroller
User’s Guide