Lattice LatticeMico8 User Manual Download Page 23

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LatticeMico

Microcontroller

Lattice Semiconductor

User’s Guide

Implementation

Technical Support Assistance

Hotline:

1-800-LATTICE (North America)

+1-503-268-8001 (Outside North America)

e-mail:

[email protected]

Internet: www.latticesemi.com

Config.

Number

Description

Device

LUTs

Registers

SLICEs

MAX

(MHz)

16 - Regs, 16 - Int SP, No Ext SP

LFXP3C-4,
LFEC3E-4

198

114

71.4 (LFXP3C-4)
77.1 (LFEC3E-4)

LCMX01200C-4

214

109

78.6 (LCMXO1200C-4)

LFE2-50E-5

220

132

90.7 (LFE2-50E-5)

32 - Regs, 16 - Int SP, No Ext SP

LFXP3C-4,
LFEC3E-4

247

138

62.4 (LFXP3C-4)
68.8 (LFEC3E-4)

LCMXO1200C-4

248

125

71.9 (LCMXO1200C-4

LFE2-50E-5

264

150

84.9 (LFE2-50E-5)

32 - Regs, 32 - Int SP, No Ext SP

LFXP3C-4,
LFEC3E-4

243

136

63.4 (LFXP3C-4)
70.0 (LFEC3E-4)

LCMXO1200C-4

262

132

70.9 (LCMXO1200C-4)

LFE2-50E-5

295

172

84.3 (LFE2-50E-5)

32 - Regs, 32 - Int SP, Ext SP

LFXP3C-4,
LFEC3E-4

275

151

62.3 (LFXP3C-4)
65.6 (LFEC3E-4)

LCMXO1200C-4

141

70.8 (LCMXO1200C-4)

LFE2-50E-5

292

169

86.2 (LFE2-50E-5)

1. SP = Scratch Pad

Summary of Contents for LatticeMico8

Page 1: ...ter medical industrial and automotive The core consumes minimal device resources less than 200 Look Up Tables LUTs in the smallest configuration while maintaining a broad feature set Features 8 bit Da...

Page 2: ...ar interrupt sti set interrupt When an interrupt is received the address of the next instruc tion is pushed into the call stack and the microcontroller continues execution from the interrupt vector ad...

Page 3: ...ite In the case of the exporti instruction the ext_addr signal is driven from the register file otherwise for the export instruction it is driven directly from the instruction Figure 3 Microcontroller...

Page 4: ...ith the carry out from the addition The zero flag is set to 1 if all the bits of the result are 0 ADDIC Rd CC Rd Rd CCCCCCCC Carry Flag add register constant and carry flag The carry flag is updated w...

Page 5: ...o 1 if all the bits of the result are 0 SUBIC Rd C Rd Rd CCCCCCCC Carry Flag subtract constant with carry from register The carry flag is set to 1 if the result is negative The zero flag is set to 1 i...

Page 6: ...CCC bitwise AND register with constant The zero flag is set to 1 if all the bits of the result are 0 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 0 0 0 Rd Rd Rd Rd Rd Rb Rb Rb Rb Rb 0 0 0 CY Flag U...

Page 7: ...CC bitwise XOR register with constant The zero flag is set to 1 if all the bits of the result are 0 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 1 1 0 0 Rd Rd Rd Rd Rd Rb Rb Rb Rb Rb 0 0 0 CY Flag U...

Page 8: ...eration is not written back The zero flag is set to 1 if all the bits of the result are 0 TESTI Rd CC Perform a bitwise AND between Rd and Constant update the zero flag The result of the AND operation...

Page 9: ...to the carry flag The zero flag is set to 1 if all the bits of the result are 0 ROL Rd Rb Rotate left Register B is shifted left by one bit The highest order bit is shifted into the lowest order bit T...

Page 10: ...y Flag 1 Set carry flag CLRZ Zero Flag 0 Clear zero flag 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 0 1 0 0 Rd Rd Rd Rd Rd Rb Rb Rb Rb Rb 0 1 1 CY Flag Updated Zero Flag Updated Yes Yes 17 16 15 14...

Page 11: ...bel from the current PC If zero flag is 0 then execution continues with the following instruction The offset can be 512 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1...

Page 12: ...f Label Else PC PC 1 Branch if not carry If carry flag is not set the PC is incremented by the signed offset of the label from the current PC If carry flag is set then execution continues with the fol...

Page 13: ...by the signed offset of the label from the current PC If the zero flag is set then execu tion continues from the following instruction CALLC Label If Carry Flag 1 then Push PC 1 into Call Stack PC PC...

Page 14: ...is pushed into the call stack and the PC is incremented by the signed offset of the label from the current PC RET PC Top of Call Stack Pop Call Stack Unconditional return PC is set to the value on th...

Page 15: ...RT Rd Port Port Value Port Rd Output value of Register D to Port Port can be 0 31 EXPORTI Rd Rb Port Value Rb Rd Output value of Register D to Port designated by Register B Port can be 0 255 17 16 15...

Page 16: ...nated by constant SS The location address can be 0 31 SSPI Rd Rb Scratch Pad Rb Rd Store into scratch pad memory indirect Store value of register D into scratch pad memory location designated by regis...

Page 17: ...external scratch pad memory The ext_dout is used to write data into the external memory The address bus ext_addr is also shared Assembler and Instruction Set Simulator The software tools for the Latti...

Page 18: ...in the Instruction Set section Pseudo Ops The Assembler supports the following pseudo ops Option Comment nop Expanded by the Assembler to mov R0 R0 An instruction without side effects Labels Label de...

Page 19: ...er will terminate with an error if the org directive is given a location which is less than the current local counter value equ This directive can be used to assign symbolic names to constants The syn...

Page 20: ...ails ix Program file is in hexadecimal format default This is the file generated by the Assembler with the vx options default ib Program file is in binary format This is the file generated by the Asse...

Page 21: ...following commands should be used in the Unix and Windows environments Unix and Cygwin Environments gcc o isp8sim isp8sim c Windows Environment cl o isp8sim_win isp8sim c Example To display the featu...

Page 22: ...e of program mov r7 r5 mov r5 r6 andi r5 0x0f masking r5 to get the speed mov r25 r5 cmpi r7 0x10 bz phase2 cmpi r7 0x20 bz phase2 b start phase2 cmpi r25 0x01 bz phase3 cmpi r25 0x02 bz phase3 cmpi r...

Page 23: ...4 LCMX01200C 4 214 71 109 78 6 LCMXO1200C 4 LFE2 50E 5 220 71 132 90 7 LFE2 50E 5 2 32 Regs 16 Int SP No Ext SP LFXP3C 4 LFEC3E 4 247 71 138 62 4 LFXP3C 4 68 8 LFEC3E 4 LCMXO1200C 4 248 71 125 71 9 L...

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