18
LatticeMico
8
Microcontroller
Lattice Semiconductor
User’s Guide
• Verilog initialization file (included in design before synthesis)
In addition to these outputs, the Assembler can also generate an assembler listing file.
Command Line
<executable filename> -option1 -option2 ... <input filename>
Command Line Options
Option
Comment
-o <filename>
Fully qualified name of the output file.
-s <Program Rom Size>
Default 512 bytes
-l
Generate listing file. The listing file is generated in the same directory as the
source with the extension .lst.
-vx
Generate output in hexadecimal (default)
-vb
Generate output in binary
-ve
Generate output in Verilog “INIT” format
-?
Help message
Instructions
The Assembler supports all instructions as described in the Instruction Set section.
Pseudo-Ops
The Assembler supports the following pseudo-ops:
Option
Comment
nop
Expanded by the Assembler to mov R0,R0. An instruction without side effects.
Labels
Label definitions are any character sequences ending in a ‘:’. No other instruction or Assembler directives are
allowed in the same line as a label definition.
The Assembler allows both forward and backward references to a label (i.e. it is legal to reference a label before it
is defined). Both references in the following example are valid.
BackLabel:
...
...
b
BackLabel
...
...
b
ForwardLabel
...
...
ForwardLabel:
Comments
The character ‘#’ is used as the start of a comment. Everything following the comment character until a new line is
ignored by the Assembler.
Constants
The assembler accepts constants in various formats.
•
Hexadecimal values
: Hexadecimal constants must be prefixed with “0x” or “0X”. (e.g. 0xFF, 0x12, and 0XAB are
all valid hexadecimal constants).
