N2HET Control Registers
876
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
High-End Timer (N2HET) Module
20.4.32 Loop Back Pair Direction Register (HETLBPDIR)
Refer to
for a description of loopback test functions.
N2HET1:
offset = FFF7 B890h;
N2HET2:
offset = FFF7 B990h
Figure 20-87. Loop Back Pair Direction Register (HETLBPDIR)
31
20
19
16
Reserved
LBPTSTENA
R-0
R/WP-5h
15
14
13
12
11
10
9
8
LBPDIR31/30
LBPDIR29/28
LBPDIR27/26
LBPDIR25/24
LBPDIR23/22
LBPDIR21/20
LBPDIR19/18
LBPDIR17/16
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
7
6
5
4
3
2
1
0
LBPDIR15/14
LBPDIR13/12
LBPDIR11/10
LBPDIR9/8
LBPDIR7/6
LBPDIR5/4
LBPDIR3/2
LBPDIR1/0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privileged mode only; -
n
= value after reset
Table 20-49. Loop Back Pair Direction Register (HETLBPDIR) Field Descriptions
Bit
Field
Value
Description
31-20
Reserved
0
Reads return 0. Writes have no effect.
19-16
LBPTSTENA
Loopback Test Enable Key
5h
Loopback Test is disabled.
Ah
Loopback Test is enabled.
Others
Loopback Test is disabled.
15-0
LBPDIR
n+1 / n
Loop Back Pair Direction Bits
0
The HR structures on pins HET[n+1] and HET[n] are internally connected with HET[n] as input and
HET[n+1] as output.
1
The HR structures on pins HET[n+1] and HET[n] connected with HET[n] as output and HET[n+1]
as input.
NOTE:
The loop back direction can be selected independent on the HETDIR register setting.
