SCI Low-Power Mode
1248
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
Serial Communication Interface (SCI)/ Local Interconnect Network (LIN)
Module
25.6 SCI Low-Power Mode
The SCI/LIN can be put in either local or global low-power mode. Global low-power mode is asserted by
the system and is not controlled by the SCI/LIN. During global low-power mode, all clocks to the SCI/LIN
are turned off so the module is completely inactive.
Local low-power mode is asserted by setting the POWERDOWN bit; setting this bit stops the clocks to the
SCI/LIN internal logic and the module registers. Setting the POWERDOWN bit causes the SCI to enter
local low-power mode and clearing the POWERDOWN bit causes SCI/LIN to exit from local low-power
mode. All the registers are accessible during local power-down mode as any register access enables the
clock to SCI for that particular access alone.
The wake-up interrupt is used to allow the SCI to exit low-power mode automatically when a low level is
detected on the LINRX pin and also this clears the POWERDOWN bit. If wake-up interrupt is disabled,
then the SCI/LIN immediately enters low-power mode whenever it is requested and also any activity on
the LINRX pin does not cause the SCI to exit low-power mode.
NOTE:
Enabling Local Low-Power Mode During Receive and Transmit
If the wake-up interrupt is enabled and low-power mode is requested while the receiver is
receiving data, then the SCI immediately generates a wake-up interrupt to clear the
powerdown bit and prevents the SCI from entering low-power mode and thus completes the
current reception. Otherwise, if the wake-up interrupt is disabled, then the SCI completes the
current reception and then enters the low-power mode.
25.6.1 Sleep Mode for Multiprocessor Communication
When the SCI receives data and transfers that data from SCIRXSHF to SCIRD, the RXRDY bit is set and
if RX INT ENA is set, the SCI also generates an interrupt. The interrupt triggers the CPU to read the newly
received frame before another one is received. In multiprocessor communication modes, this default
behavior may be enhanced to provide selective indication of new data. When SCI receives an address
frame that does not match its address, the device can ignore the data following this non-matching address
until the next address frame by using sleep mode. Sleep mode can be used with both idle-line and
address-bit multiprocessor modes.
If sleep mode is enabled by the SLEEP bit, then the SCI transfers data from SCIRXSHF to SCIRD only for
address frames. Therefore, in sleep mode, all data frames are assembled in the SCIRXSHF register
without being shifted into the SCIRD and without initiating a receive interrupt or DMA request. Upon
reception of an address frame, the contents of the SCIRXSHF are moved into SCIRD, and the software
must read SCIRD and determine if the SCI is being addressed by comparing the received address against
the address previously set in the software and stored somewhere in memory (the SCI does not have
hardware available for address comparison). If the SCI is being addressed, the software must clear the
SLEEP bit so that the SCI will load SCIRD with the data of the data frames that follow the address frame.
When the SCI has been addressed and sleep mode has been disabled (in software) to allow the receipt of
data, the SCI should check the RXWAKE bit (SCIFLR.12) to determine when the next address has been
received. This bit is set to 1 if the current value in SCIRD is an address and set to 0 if SCIRD contains
data. If the RXWAKE bit is set, then software should check the address in SCIRD against its own address.
If it is still being addressed, then sleep mode should remain disabled. Otherwise, the SLEEP bit should be
set again.
