EMIF Module Architecture
647
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
External Memory Interface (EMIF)
17.2.13 Priority and Arbitration
describes the external prioritization and arbitration among requests from different sources
within the microcontroller. The result of this external arbitration is that only one request is presented to the
EMIF at a time. Once the EMIF completes a request, the external arbiter then provides the EMIF with the
next pending request.
Internally, the EMIF undertakes memory device transactions according to a strict priority scheme. The
highest priority events are:
•
A device reset.
•
A write to any of the three least significant bytes of the SDRAM configuration register (SDCR).
Either of these events will cause the EMIF to immediately commence its initialization sequence as
described in
.
Once the EMIF has completed its initialization sequence, it performs memory transactions according to the
following priority scheme (highest priority listed first):
1. If the EMIF's backlog refresh counter is at the Refresh Must urgency level, the EMIF performs multiple
SDRAM auto refresh cycles until the Refresh Release urgency level is reached.
2. If an SDRAM or asynchronous read has been requested, the EMIF performs a read operation.
3. If the EMIF's backlog refresh counter is at the Refresh Need urgency level, the EMIF performs an
SDRAM auto refresh cycle.
4. If an SDRAM or asynchronous write has been requested, the EMIF performs a write operation.
5. If the EMIF's backlog refresh counter is at the Refresh May or Refresh Release urgency level, the
EMIF performs an SDRAM auto refresh cycle.
6. If the value of the SR bit in SDCR has been set to 1, the EMIF will enter the self-refresh state as
described in
After taking one of the actions listed above, the EMIF then returns to the top of the priority list to determine
its next action.
Because the EMIF does not issue auto-refresh cycles when in the self-refresh state, the above priority
scheme does not apply when in this state. See
for details on the operation of the EMIF
when in the self-refresh state.
