N2HET Control Registers
875
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
High-End Timer (N2HET) Module
20.4.31 Loop Back Pair Select Register (HETLBPSEL)
Refer to
for a description of loopback test functions.
N2HET1:
offset = FFF7 B88Ch;
N2HET2:
offset = FFF7 B98Ch
Figure 20-86. Loop Back Pair Select Register (HETLBPSEL)
31
30
29
28
27
26
25
24
LBPTYPE31/30 LBPTYPE29/28 LBPTYPE27/26 LBPTYPE25/24 LBPTYPE23/22 LBPTYPE21/20 LBPTYPE19/18 LBPTYPE17/16
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
23
22
21
20
19
18
17
16
LBPTYPE15/14 LBPTYPE13/12 LBPTYPE11/10
LBPTYPE9/8
LBPTYPE7/6
LBPTYPE5/4
LBPTYPE3/2
LBPTYPE1/0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
15
14
13
12
11
10
9
8
LBPSEL31/30
LBPSEL29/28
LBPSEL27/26
LBPSEL25/24
LBPSEL23/22
LBPSEL21/20
LBPSEL19/18
LBPSEL17/16
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
7
6
5
4
3
2
1
0
LBPSEL15/14
LBPSEL13/12
LBPSEL11/10
LBPSEL9/8
LBPSEL7/6
LBPSEL5/4
LBPSEL3/2
LBPSEL1/0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset
Table 20-48. Loop Back Pair Select Register (HETLBPSEL) Field Descriptions
Bit
Field
Value
Description
31-16
LBPTYPE
n+1 / n
Loop Back Pair Type Select Bits
These bits are valid only when Loopback mode is enabled (HETLBPDIR[19:16] = 1010).
0
Digital loopback is selected for HR structures on pins HET[n+1] and HET[n].
1
Analog loopback is selected for HR structures on pins HET[n+1] and HET[n].
15-0
LBPSEL
n+1 / n
Loop Back Pair Select Bits
These bits are valid only when Loopback mode is enabled (HETLBPDIR[19:16] = 1010).
If bit x is set, the HR structures on pins HET[n+1] and HET[n] are connected in a loop back mode. The
direction is given by LBPDIR n+1/n and type is selected by LBPTYPE n+1/n.
The pin which is not driven by the N2HET pin actions can still be used as normal GIO pin.
