Overview
228
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
I/O Multiplexing and Control Module (IOMM)
4.1
Overview
This chapter describes the overall features of the module which controls the I/O multiplexing on the
device. The mapping of control registers to multiplexing options is specified in
4.2
Main Features of I/O Multiplexing Module (IOMM)
The IOMM contains memory-mapped registers (MMR) that control device-specific multiplexed functions.
The safety and diagnostic features of the IOMM are:
•
Kicker mechanism to protect the MMRs from accidental writes
•
Error indication for access violations
4.3
Control of Multiplexed Functions
Several functions are multiplexed on this microcontroller. The following sections describe the multiplexing
scheme and its implementation.
4.3.1 Control of Multiplexed Outputs
The signal multiplexing controlled by each memory-mapped control register (PINMMRn) is described in
. Each byte in the PINMMRs control the functionality output on a single terminal. Consider the
following example for the PINMMR10 control register.
Figure 4-1. PINMMR10 Control Register, Address = FFFF EB38h
31
26
25
24
Reserved
EMIF DATA[2]
ETM DATA[18]
RWP-0
R/WP-0
R/WP-1
23
18
17
16
Reserved
RTP DATA[15]
EMIF nCS[0]
RWP-0
R/WP-0
R/WP-1
15
10
9
8
Reserved
EMIF DATA[3]
ETM DATA[19]
RWP-0
R/WP-0
R/WP-1
7
3
2
1
0
Reserved
RMII_RX_ER
MII_RX_ER
AD1 EVT
RWP-0
R/WP-0
R/WP-0
R/WP-1
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privileged mode only; -
n
= value after reset
•
Consider the multiplexing controlled by PINMMR10[15–8]. These bits control the multiplexing between
the ETMDATA[19] and EMIF_DATA[3] on the ball N15 of the 337BGA package for this device. The
default function on the N15 ball is ETMDATA[19]. This is indicated by bit 8 of the PINMMR10 register
being set.
•
If the application wants to use N15 as an EMIF_DATA[3] signal, then bit 8 of PINMMR10 must be
cleared and bit 9 must be set.
•
Each feature of the output function is determined by the function selected to be output on a terminal.
For example, the ball N15 on the 337BGA package is driven by an output buffer with an 8mA drive
strength and which supports the adaptive impedance control mode for reduced electromagnetic emissions.
This output buffer has the following signals: A (signal to be output), GZ (output enable), SBEN (Standard
Buffer Enable) and LPM (Low Power Mode). Each of these signals is an output of a multiplexor which
allows the selected function to control all available features of the output buffer.
