Instruction Set
962
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
High-End Timer (N2HET) Module
event
Specifies the event that triggers the capture.
Table 20-96. Event Encoding Format for WCAP
C6
C5
Capture Condition
0
0
Always
0
1
Capture on falling edge
1
0
Capture on rising edge
1
1
Capture on rising and falling edge
irq
ON generates an interrupt when the capture condition is met. No
interrupt is generated for OFF.
Default: OFF.
data
Specifies the 25-bit integer value to be written to the data field or
selected register.
hr_data
HR capture value.
Default: 0.
NOTE:
WCAP in HR Mode: The HR Counter starts on a WCAP instruction execution (in the first
loop clock) and will synchronize to the next loop clock. When N2HET is turned on and a
capture edge occurs in the first loop clock (where the HR counter hasn’t been synchronized
to the loop clock), then the captured HR counter value is wrong and is of no use. So the
captured HR data in the first loop clock should be ignored.
Execution
If (Specified Capture Condition is true on Selected Pin
OR Unconditional capture is selected)
{
Immediate Data Field = Selected register value;
If (hr_lr bit == 0) Capture the HR value in Immediate HR Data Field;
If (Interrupt Enable == 1) HETFLG[n] = 1;
/* n depends on address */
If ([C28:C27] == 01) Generate request on request line [P25:P23];
If ([C28:C27] == 11) Generate quiet request on request line [P25:P23];
Jump to Conditional Address;
}
Jump to Next Program Address;
Prv bit = Current Logic (Lx) value of selected pin; (always executed)
The specific interrupt flag that is triggered depends on the address from which the instruction is executed,
see
