Timer data in
HET[x]
Loop
Resolution
Clock
Timer data out
HETDIR
HETDIN
HETDOUT
HETDSET
HETDCLR
N2HET Functional Description
805
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
High-End Timer (N2HET) Module
20.2.5.1 Using General-Purpose I/O Data Set and Clear Registers
The N2HET Data Clear Register (HETDCLR) and N2HET Data Set Register (HETDSET) can be used to
minimize the number of accesses to the peripheral to modify the output register and output pins. When the
application needs to set or to reset some N2HET pins without changing the value of the others pins, the
first possibility is to read N2HET Data Output Register (HETDOUT), modify the content (AND, OR, and so
on), and write the result into N2HET Data Output Register (HETDOUT). However, this read-modify-write
sequence could be interrupted by a different function modifying the same register which will result in a
data coherency problem.
Using the N2HET Data Set Register (HETDSET) or N2HET Data Clear Register (HETDCLR), the
application program must write the mask value (same mask value for the first option) to the register to set
or reset the desired pins. Any bits written as 0 to HETDSET and HETDCLR are left unchanged, which
avoids the possible coherency problem of the read-modify-write approach.
Coding Example (C program): Set pins using the 2 methods.
unsigned int MASK;
/* Variable that content the bit mask
*/
volatile unsigned int *HETDOUT,*HETDSET;
/* Pointer to HET registers
*/
...
*HETDOUT = *HETDOUT | MASK;
/* Read-modify-write of HETDOUT
*/
*HETDSET = MASK;
/* Set the pin without reading HETDOUT */
20.2.5.2 Loop Resolution Structure
The N2HET uses the pins N2HET [31:0] as input and/or output by the way of the instruction set. Actually,
each pin could monitor the N2HET program or could be monitored by the N2HET program. By using the
I/O register of the N2HET, the CPU is able to interact with the N2HET program flow.
When an action (set or reset) is taken on a pin by the N2HET program, the N2HET will modify the pin at
the rising edge of the next loop resolution clock.
When an event occurs on a N2HET I/O pin, it is taken into account at the next rising edge of the loop
resolution clock.
The structure of each pin is shown in
Figure 20-9. N2HET Loop Resolution Structure for Each Bit
The example in
shows a simple PWM generation with loop resolution accuracy. The
corresponding program is:
HETPFR[31:0] register = 0x201 --> lr=4 and hr=2 --> ts = 8
N2HET Program:
L00
CNT
{ next= L01, reg=A, irq=OFF, max = 4 }
L01
ECMP
{ next= L00, cond_addr= L00, hr_lr=LOW, en_pin_action=ON, pin=0,
action=PULSEHI, reg=A, irq=OFF,
data= 1, hr_data = 0x0
}
; 25 bit compare value is 1 and the 7-bit HR compare value is 0
