USB Device Controller
1651
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
Universal Serial Bus (USB)
29.3.27.9 Important Note on DMA Requests
For each direction, only one DMA request can be active at any time. A request must then be serviced to
allow the next pending request on the same direction to be asserted. In particular, a TX DMA request is
asserted at each start-of-frame if a TX DMA channel is configured for an isochronous endpoint; this
request must be serviced imperatively.
29.3.27.10 Note on DMA Channels Deconfiguration
It is recommended that the CPU wait for an EOT (RX) or a DONE (TX) interrupt before disabling the
channel by writing a value 0 in the TX/RXDMA_CFG register. However, if needed by the application, the
CPU can unselect the endpoint number in the TX/RXDMA_CFG register during a DMA transfer. The
resulting behavior is:
•
For RX transfer:
–
If RX DMA request is active for the endpoint when the endpoint is unselected, deconfiguration is
effective only at the end of the RX DMA request (that is, after all the DMA data have been read).
When double-buffering is used, the deconfiguration is effective after both buffers have been read (if
both buffers were not empty at unselection). An EOT interrupt is asserted if an end-of-transfer is
detected.
–
If the RX DMA request is not active when unselection occurs, the effect is immediate.
•
For TX transfer:
–
If the request is active when the endpoint is unselected, deconfiguration is effective after the TX
DMA request has been handled and the TX data have been sent through an IN transaction (both
buffers in case of double-buffering with both buffers full). No TX_DONE interrupt is asserted even if
TXDMAn.TSC bit value is 0 after the transaction.
–
If the TX DMA request is inactive when the endpoint is unselected, deconfiguration is effective
when all data available in TX buffer(s) have been sent through IN transaction(s). If the
TXDMAn_TSC value is 0 at this point, no TX_DONE interrupt is asserted. If TX_DONE interrupt
had already been asserted when the endpoint is deselected, configuration is effective only after the
TX_DONE interrupt handling.
TX/RXDMA_CFG.TX/RXDMAn_EP reflects the endpoint value until deconfiguration is effective. The CPU
must read this register to know if the channel has been disabled yet or not. It must wait until the read
value is 0 before performing other actions to the endpoint. After effective deconfiguration, all transactions
to the endpoint generate an endpoint-specific interrupt (if non-transparent).
If the selected endpoint is of isochronous type, deconfiguration is effective after the TX/RX request has
been serviced, and the subsequent isochronous transactions are handled at SOF interrupt through the
endpoint registers (EP_NUM and STAT_FLG).
29.3.28 Power Management
shows the values assigned to the USB device controller signals concerned with power
management, in the function of the device state. These signals are:
•
PUEN_O: Pullup enable signal, always reflecting the SYSCON1.PULLUP_EN register bit
•
SHUTOFF_O: Power circuitry shutoff signal, controlled by the core and the SYSCON1.SOFF_DIS bit
•
DS_WAKE_REQ_ON: Deep-sleep wake request, asserted low when the interface clock is needed
•
SUSPEND_O: Suspend signal, asserted high when the device is in suspend mode
From a software point of view,
shows the reaction. This flowchart does not need to be
implemented; it only reflects the way the module can enter deep sleep.
