HTU Control Registers
995
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
High-End Timer Transfer Unit (HTU) Module
NOTE:
For cases E and F above, after the last frame of a buffer, the HTU sets CFTCTx to 0 and
CFADDRx to the next address after the buffer. If the DCP was disabled during this state,
then both CFTCTx and CFADDRx would contain invalid initialization values. Therefore, if a
DCP should continue at its current address, then the software should use one of the
following two procedures before it (re-) enables the DCP (as per
1.
If CFTCTx
≠
0 then set BIM=1
If CFTCTx = 0 then set
BIM=0
2.
If CFTCTx
≠
0 then set
BIM=1
If CFTCTx = 0 then {set
BIM=1;
set CFTCTx = IFTCOUNT;
set CFADDRx = IFADDRx}
But note that these procedures are only required for the cases E and F and not for all the
other cases shown in
. Also, when a buffer reaches its end in circular mode, it
uses the initial DCP information to restart independently of the BIM setting (assuming it is not
temporarily disabled during CFTCTx = 0).
NOTE:
Similarly, care needs to be taken when BIM is set to 1 and a DCP is enabled for the very first
time. Also, in this case, CFTCTx and CFADDRx usually contain invalid initialization values.
The software can either solve this by setting BIM = 0 for the first time or setting CFADDRx to
IFADDRx and CFTCTx to IFTCOUNT before the DCP is enabled.
NOTE:
If
•
the HTUEN bit is changed to 1 after the HTU was disabled HTUEN = 0
•
the CPENA bit pair is 01 or 10 (during this HTUEN change)
then the corresponding BIM bit will decide if the corresponding buffer continues at its initial or
current address. Cases E and F in
also apply for this situation. The software
should use the procedures explained in the first note before setting HTUEN.
