Texas Instruments RM48 series, Technical Reference Manual

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Double Control Packet Configuration Memory
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1008 SPNU503C – March 2018
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High-End Timer Transfer Unit (HTU) Module
21.5 Double Control Packet Configuration Memory
All bits marked "reserved' are implemented in RAM and will be initialized to unknown values after power
on. Reserved locations can be written and read but should be written with 0 to ensure future compatibility.
The HTU RAM can be cleared with the system RAM initialization function.
Table 21-42 provides a summary of the memory configuration. There are eight sets of DCP registers and
eight sets of CF registers. The base address for the DCP registers is FF4E 0000h for HTU1 and
FF4C 0000h for HTU2.
Table 21-42. Double Control Packet Memory Map
Offset Acronym Register Description Section
00h HTU DCP0 IFADDRA Initial Full Address A Register Section 21.5.1
04h HTU DCP0 IFADDRB Initial Full Address B Register Section 21.5.2
08h HTU DCP0 IHADDRCT Initial N2HET Address and Control Register Section 21.5.3
0Ch HTU DCP0 ITCOUNT Initial Transfer Count Register Section 21.5.4
10h HTU DCP1 IFADDRA Initial Full Address A Register Section 21.5.1
14h HTU DCP1 IFADDRB Initial Full Address B Register Section 21.5.2
18h HTU DCP1 IHADDRCT Initial N2HET Address and Control Register Section 21.5.3
1Ch HTU DCP1 ITCOUNT Initial Transfer Count Register Section 21.5.4
: : :
70h HTU DCP7 IFADDRA Initial Full Address A Register Section 21.5.1
74h HTU DCP7 IFADDRB Initial Full Address B Register Section 21.5.2
78h HTU DCP7 IHADDRCT Initial N2HET Address and Control Register Section 21.5.3
7Ch HTU DCP7 ITCOUNT Initial Transfer Count Register Section 21.5.4
100h HTU CDCP0 CFADDRA Current Full Address A Register Section 21.5.5
104h HTU CDCP0 CFADDRB Current Full Address B Register Section 21.5.6
108h HTU CDCP0 CFCOUNT Current Frame Count Register Section 21.5.7
110h HTU CDCP1 CFADDRA Current Full Address A Register Section 21.5.5
114h HTU CDCP1 CFADDRB Current Full Address B Register Section 21.5.6
118h HTU CDCP1 CFCOUNT Current Frame Count Register Section 21.5.7
: : :
170h HTU CDCP7 CFADDRA Current Full Address A Register Section 21.5.5
174h HTU CDCP7 CFADDRB Current Full Address B Register Section 21.5.6
178h HTU CDCP7 CFCOUNT Current Frame Count Register Section 21.5.7