Control Registers and Control Packets
575
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
Direct Memory Access Controller (DMA) Module
16.3.1.16 Port Assignment Register 0 (PAR0)
Figure 16-33. Port Assignment Register 0 (PAR0) [offset = 94h]
31
30
28
27
26
24
23
22
20
19
18
16
Rsvd
CH0PA
Rsvd
CH1PA
Rsvd
CH2PA
Rsvd
CH3PA
R-0
R/WP-0
R-0
R/WP-0
R-0
R/WP-0
R-0
R/WP-0
15
14
12
11
10
8
7
6
4
3
2
0
Rsvd
CH4PA
Rsvd
CH5PA
Rsvd
CH6PA
Rsvd
CH7PA
R-0
R/WP-0
R-0
R/WP-0
R-0
R/WP-0
R-0
R/WP-0
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privilege mode only; -
n
= value after reset
Table 16-25. Port Assignment Register 0 (PAR0) Field Descriptions
Bit
Field
Value
Description
31
Reserved
0
Reads return 0. Writes have no effect.
30-28
CH0PA
These bit fields determine to which port channel 0 is assigned.
1xx
Port B
0xx
Reserved
27
Reserved
0
Reads return 0. Writes have no effect.
26-24
CH1PA
These bit fields determine to which port channel 1 is assigned.
1xx
Port B
0xx
Reserved
23
Reserved
0
Reads return 0. Writes have no effect.
22-20
CH2PA
These bit fields determine to which port channel 2 is assigned.
1xx
Port B
0xx
Reserved
19
Reserved
0
Reads return 0. Writes have no effect.
18-16
CH3PA
These bit fields determine to which port channel 3 is assigned.
1xx
Port B
0xx
Reserved
15
Reserved
0
Reads return 0. Writes have no effect.
14-12
CH4PA
These bit fields determine to which port channel 4 is assigned.
1xx
Port B
0xx
Reserved
11
Reserved
0
Reads return 0. Writes have no effect.
10-8
CH5PA
These bit fields determine to which port channel 5 is assigned.
1xx
Port B
0xx
Reserved
7
Reserved
0
Reads return 0. Writes have no effect.
6-4
CH6PA
These bit fields determine to which port channel 6 is assigned.
1xx
Port B
0xx
Reserved
3
Reserved
0
Reads return 0. Writes have no effect.
2-0
CH7PA
These bit fields determine to which port channel 7 is assigned.
1xx
Port B
0xx
Reserved