Control Registers
1719
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
RAM Trace Port (RTP)
Table 31-11. RTP Global Status Register (RTPGSR) [offset = 08h] Field Descriptions (continued)
Bit
Field
Value
Description
1
OVF2
Overflow RAM block 2 FIFO.
This flag indicates that FIFO2 had all locations full and another attempt
to write data to it occurred. The bit will not be cleared automatically if the FIFO is emptied again. The bit
will stay set until the CPU clears it.
User and privilege mode (read):
0
No overflow occurred.
1
An overflow occurred.
Privilege mode (write):
0
Writing a zero to this bit has no effect.
1
The bit is cleared.
0
OVF1
Overflow RAM block 1 FIFO.
This flag indicates that FIFO1 had all locations full and another attempt
to write data to it occurred. The bit will not be cleared automatically if the FIFO is emptied again. The bit
will stay set until the CPU clears it.
User and privilege mode (read):
0
No overflow occurred.
1
An overflow occurred.
Privilege mode (write):
0
Writing a zero to this bit has no effect.
1
The bit is cleared.
