Overview
247
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
F021 Flash Module Controller (FMC)
5.1
Overview
The F021 Flash is used to provide non-volatile memory for instruction execution or data storage. The
Flash can be electrically programmed and erased many times to ease code development.
Refer to the following documents for support in how to initialize and use the on-chip Flash and its API:
•
Initialization of Hercules ARM Cortex-R4F Microcontrollers Application Report
(
)
•
F021 (Texas Instruments 65nm Flash) Flash API Reference Guide
(
)
5.1.1 Features
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Read, program and erase with a single 3.3 V supply voltage
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Supports error detection and correction
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Single Error Correction and Double Error Detection (SECDED)
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Error Correction Code (ECC) is evaluated in the CPU for the main Flash bank arrays and in the
Flash Wrapper for the EEPROM emulation Flash banks
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Address bits included in ECC calculation
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Provides different read modes to optimize performance and verify the integrity of Flash contents
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Provides built-in power mode control logic
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Integrated program/erase state machine
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Simplifies software algorithms
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Supports simultaneous read access on a bank while performing a write or erase operation on any
one of the remaining banks
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Suspend command allows read access to a sector being programmed/erased
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Fast erase and program times (for details, see the device-specific data sheet)
For the actual size of the Flash memory for the device, see the device-specific data sheet.
5.1.2 Definition of Terms
Terms used in this document have the following meaning:
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ATCM: Port A tightly coupled memory
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BAGP (Bank Active Grace Period): Time (in HCLK cycles) from the most recent Flash access of a
particular bank until that bank enters fallback power mode. This reduces power consumption by the
Flash. However, it can also increase access time.
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bw: Normal data space bank data width of a Flash bank. The bw is 128 bits (144 bits including the
error correction bits).
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bwe: EEPROM emulation bank is 128-bits wide (144 bits including the error correction bits).
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Charge pump: Voltage generators and associated control (logic, oscillator, and bandgap, for example).
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CSM: Program/erase command state machine
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Fallback power mode: The power mode (active, standby or sleep, depending on which mode is
selected) into which a bank or the charge pump falls back each time the active grace period expires.
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Flash bank: A group of Flash sectors that share input/output buffers, data paths, sense amplifiers, and
control logic.
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FEE - Flash EEPROM Emulation. Features on the FMC to support using a Flash type memory in place
of an EEPROM Flash memory. EEPROM is erasable by the word while this Flash memory is only
erasable by the sector. The FEE bank is accessible only through Bus 2 in a special address range and
always resides in bank 7.
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Flash module: Flash banks, charge pump, and Flash wrapper.
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Flash wrapper: Power and mode control logic, data path, wait logic, and write/erase state machines.
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FMC: Flash Module Controller.
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Command: A sequence of coded instructions to Flash module to execute a certain task.
