Control Registers
290
SPNU503C – March 2018
Copyright © 2018, Texas Instruments Incorporated
F021 Flash Module Controller (FMC)
Table 5-38. Diagnostic Control Register (FDIAGCTRL) Field Descriptions (continued)
Bit
Field
Value
Description
9-8
DIAG_BUF_ SEL
Diagnostic Buffer Select
0
The DIAG_BUF_SEL selects the Instruction or Data buffer to read or write when
accessing the FPRIM_ADD_TAG and FDUP_ADD_TAG registers. The address tags
consists of matching primary and duplicate address tag registers. All the primary
address tag registers are memory mapped to a common address (see
)
and are selected by DIAG_BUF_SEL. The same occurs for the duplicate address.
(see
). Bit 0 selects a data buffer if high and an instruction buffer if low.
Bits 1 indicate the buffer number.
DIAG_BUF_SEL ENCODING:
Buffer
Number
Bits 1
Inst=0
Data=1
Bit0
Buffer
0
0
Instruction Buffer 0
0
1
Data Buffer 0
1
0
Instruction Buffer 1
1
1
Data Buffer 1
7-4
Reserved
0
Reserved
2-0
DIAG_MODE
Diagnostic Mode
0
Diagnostic mode is disabled. This is the same as DIAG_EN_KEY is not equal to 5h.
1h
Diagnostic ECC Data Correction test mode (see
).
2h
Diagnostic ECC Syndrome Reporting test mode (see
).
3h
ECC Malfunction test mode 1 (same data) (see
).
4h
ECC Malfunction test mode 2 (inverted data) (see
).
5h
Address Tag Register test mode (see
).
6h
Reserved
7h
ECC Data Correction Diagnostic test mode (see
).