
R&S ZVL
Remote Control
Status Reporting System
Operating Manual 1303.6580.32-05
333
Preventing overlapping execution
To prevent an overlapping execution of commands, one of the commands *OPC, *OPC? or *WAI can be
used. For a programming example refer to section
Command Synchronization
in Chapter
Programming
Examples.
Command
Action after the hardware has settled
Programming the controller
*WAI
Stops further command
processing until all
commands sent before *WAI have been
executed
Note: The GPIB bus handshake is not stopped
Send *WAI directly after the command
which should be terminated before the
next command is executed.
*OPC?
Stops command processing until 1 is returned,
i.e. until the Operation Complete bit has been set
in the ESR. This bit indicates that the previous
commands have been completed.
Send *OPC? directly after the
command which should be terminated
before the next command is executed.
*OPC
Sets the operation complete bit in the ESR
after all previous commands have been
executed.
– Set bit 0 in the ESE
– Set bit 5 in the SRE
– Wait for service request (SRQ)
Status Reporting System
The status reporting system stores all information on the present operating state of the instrument, and on
errors which have occurred. This information is stored in the status registers and in the error queue. Both
can be queried via GPIB bus or Ethernet (STATus... commands).
Hierarchy of status registers
As shown in the graphical overview, the status information is of hierarchical structure.
STB, SRE
The STatus Byte (STB) register and its associated mask register Service Request
Enable (SRE) form the highest level of the status reporting system. The STB provides a rough
overview of the instrument status, collecting the information of the lower-level registers.
ESR, SCPI registers
The STB receives its information from the following registers:
The Event Status Register (ESR) with the associated mask register standard event status
enable (ESE).
The STATus:OPERation and STATus:QUEStionable registers which are defined by SCPI
and contain detailed information on the instrument.
IST, PPE
The IST flag ("Individual STatus"), like the SRQ, combines the entire instrument status in
a single bit. The PPE is associated to the IST flag. It fulfills an analogous function for the IST flag
as the SRE does for the service request.
Output buffer
contains the messages the instrument returns to the controller. It is not part of the
status reporting system but determines the value of the MAV bit in the STB and thus is
represented in the overview.
All status registers have the same internal structure.