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2–16 • System Architecture Synergy Q/MD Engineering Manual (v9.1 MD)
CPU Structure
This section describes the Synergy Q/MD CPU structure, in terms of which areas are controlled by
which specific microprocessors. Effectively, the CPU structure functions as a master/slave
multi-processor system, where the master processor controls high level functionality, and delegates
other tasks to slave processors.
Processor distribution and functionality is as follows:
• One “PowerPC 440GX” on the Frame CPU Board is responsible for performing high
level functions, and issuing commands to the remaining microprocessors. This processor
manages all serial channels to and from the frame, manages communications with the
control panel, and manages communications with all other peripheral devices connected
to the frame.
The Frame Processor also controls non-MLE functions, including all Aux Bus functions
and all crosspoint switching on the Crosspoint module. It does not control the Preview
Overlay module, but it does issue commands to that module, in terms of what text and
graphics to display.
• One “PowerPC 440GX” on the Video Processor Board processes high-level
information from the Frame CPU board that pertains to the current state and specific
commands issued on each MLE.
This high level information includes which functions are enabled or disabled, and what
configurations have been set up by the user on the control panel. The Video Processor
board translates that information, and sets the required bits in the hardware to complete
the command request.
Following are several examples:
~ If you press WIPE in an MLE and select the circle wipe in the Pattern Control
Group , that information goes to the Frame CPU — which in turn tells the selected
Video Processor that a circle wipe has been requested. The Video Processor then
draws the proper tables required to make the image.
~ If you pull the Fader from Program to Preset, the Frame Processor receives that
information and analyzes how it affects the high level structures within the switcher
— e.g., which buses are moving, what type of effect has been requested (Dissolve,
Wipe, DVE Send, etc.). The Frame Processor passes the current state of a particular
field to the MLE Processor, which then writes the specific effect values to the video
processing circuitry.
~ If you press the AUTO TRANS button, that command goes from the Control Panel
to the Frame Processor, which in turn keeps track of which state the transition is in.
Commands are then issued to the MLE Processor to perform the transition at (for
example) 4% in one field, 8% in the next field — until complete. The MLE
Processor in turn
does not process the video itself, but rather issues commands to
the hardware on the MLE Board to set the mixer to the requested ratio and
manipulate the pixels accordingly.
• One “PowerPC 405EP” on the Output Board is used for local control of this card. It
also provides internal ethernet access, program store, and still store images.
• One “PowerPC 405EP” on the Squeeze & Tease MD Carrier Board governs the
on-board communication and control, as well as the communication with the midplane
and the daughter cards mounted on the board.
The Squeeze & Tease MD Carrier board also contains 1 TI TMS320C6414, which
performs all the mathematical calculations required for the DVE effects.