Freescale Semiconductor MC9S12ZVHL32, Reference Manual

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Chapter 21 64 KB Flash Module (S12ZFTMRZ64K2KV2)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor 707
All possible P-Flash protection scenarios are shown in Figure 21-14 . Although the protection scheme is
loaded from the Flash memory at global address 0xFF_FE0C during the reset sequence, it can be changed
by the user. The P-Flash protection scheme can be used by applications requiring reprogramming in single
chip mode while providing as much protection as possible if reprogramming is not required.
2
FPLDIS
Flash Protection Lower Address Range Disable — The FPLDIS bit determines whether there is a
protected/unprotected area in a specific region of the P-Flash memory beginning with global address
0xFF_8000.
0 Protection/Unprotection enabled
1 Protection/Unprotection disabled
1–0
FPLS[1:0]
Flash Protection Lower Address Size — The FPLS bits determine the size of the protected/unprotected area
in P-Flash memory as shown in Table 21-22 . The FPLS bits can only be written to while the FPLDIS bit is set.
Table 21-20. P-Flash Protection Function
FPOPEN FPHDIS FPLDIS Function
(1)
1. For range sizes, refer to Table 21-21 and Table 21-22 .
1 1 1 No P-Flash Protection
1 1 0 Protected Low Range
1 0 1 Protected High Range
1 0 0 Protected High and Low Ranges
0 1 1 Full P-Flash Memory Protected
0 1 0 Unprotected Low Range
0 0 1 Unprotected High Range
0 0 0 Unprotected High and Low Ranges
Table 21-21. P-Flash Protection Higher Address Range
FPHS[1:0] Global Address Range Protected Size
00 0xFF_F800–0xFF_FFFF 2 KB
01 0xFF_F000–0xFF_FFFF 4 KB
10 0xFF_E000–0xFF_FFFF 8 KB
11 0xFF_C000–0xFF_FFFF 16 KB
Table 21-22. P-Flash Protection Lower Address Range
FPLS[1:0] Global Address Range Protected Size
00 0xFF_8000–0xFF_83FF 1 KB
01 0xFF_8000–0xFF_87FF 2 KB
10 0xFF_8000–0xFF_8FFF 4 KB
11 0xFF_8000–0xFF_9FFF 8 KB
Table 21-19. FPROT Field Descriptions (continued)
Field Description