Chapter 6 S12Z Debug (S12ZDBGV2) Module
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor
221
The number of core clock cycles since the last entry equals the tim 1. The core clock runs at twice
the frequency of the bus clock. The timestamp of the first trace buffer entry is 0x0000. With timestamps
enabled trace buffer entries are initiated in the following ways:
•
according to the trace mode specification, for example COF PC addresses in Normal mode
•
on a timestamp counter overflow
If the timestamp counter reaches 0xFFFF then a trace buffer entry is made, with timestamp=
0xFFFF and the timestamp overflow bit TOVF is set.
•
on a match of comparator D
If STAMP and DSTAMP are set then comparator D is used for forcing trace buffer entries with
timestamps. The state control register settings determine if comparator D is also used to trigger the
state sequencer. Thus if the state control register configuration does not use comparator D, then it
is used solely for the timestamp function. If comparator D initiates a timestamp then the CTI bit is
set in the INFO byte. This can be used in Normal/Loop1 mode to indicate when a particular data
access occurs relative to the PC flow. For example when the timing of an access may be unclear
due to the use of indexes.
NOTE
If comparator D is configured to match a PC address then associated
timestamps trigger a trace buffer entry during execution of the previous
instruction. Thus the PC stored to the trace buffer is that of the previous
instruction.The comparator must contain the PC address of the instruction’s
first opcode byte
Timestamps are disabled in Pure PC mode.
6.4.5.4
Reading Data from Trace Buffer
The data stored in the trace buffer can be read using either the background debug controller (BDC) module
or the CPU provided the DBG module is not armed and is configured for tracing by TSOURCE. When the
ARM bit is set the trace buffer is locked to prevent reading. The trace buffer can only be unlocked for
reading by an aligned word write to DBGTB when the module is disarmed. The trace buffer can only be
read through the DBGTB register using aligned word reads. Reading the trace buffer while the DBG
module is armed, or trace buffer locked returns 0xEE and no shifting of the RAM pointer occurs. Any byte
or misaligned reads return 0xEE and do not cause the trace buffer pointer to increment to the next trace
buffer address.
Reading the trace buffer is prevented by internal hardware whilst profiling is active because the RAM
pointer is used to indicate the next row to be transmitted. Thus attempted reads of DBGTB do not return
valid data when the PROFILE bit is set. To initialize the pointer and read profiling data, the PROFILE bit
must be cleared and remain cleared.
The trace buffer data is read out first-in first-out. By reading CNT in DBGCNT the number of valid 64-bit
lines can be determined. DBGCNT does not decrement as data is read.
Whilst reading, an internal pointer is used to determine the next line to be read. After a tracing session, the
pointer points to the oldest data entry, thus if no overflow has occurred, the pointer points to line0. The
