Chapter 10 Analog-to-Digital Converter (ADC12B_LBA_V1)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
368
Freescale Semiconductor
10.4.2.4
ADC Timing Register (ADCTIM)
Read: Anytime
Write: These bits are writable if bit ADC_EN is clear or bit SMOD_ACC is set
Module Base + 0x0003
7
6
5
4
3
2
1
0
R
0
PRS[6:0]
W
Reset
0
0
0
0
0
1
0
1
= Unimplemented or Reserved
Figure 10-7. ADC Timing Register (ADCTIM))
Table 10-6. ADCTIM Field Descriptions
Field
Description
6-0
PRS[6:0]
ADC Clock Prescaler
— These 7bits are the binary prescaler value PRS. The ADC conversion clock frequency
is calculated as follows:
Refer to Device Specification for allowed frequency range of f
ATDCLK
.
fA
TD
CLK
fBUS
2x
PRS 1
+
------------------------------------
=
