Chapter 10 Analog-to-Digital Converter (ADC12B_LBA_V1)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor
391
10.4.2.20 ADC Command Base Pointer Register (ADCCBP)
Read: Anytime
Write: Bits CMD_PTR[23:2] writable if bit ADC_EN clear or bit SMOD_ACC set
Module Base + 0x001D
23
22
21
20
19
18
17
16
R
CMD_PTR[23:16]
W
Reset
0
0
0
0
0
0
0
0
Module Base + 0x001E
15
14
13
12
11
10
9
8
R
CMD_PTR[15:8]
W
Reset
0
0
0
0
0
0
0
0
Module Base + 0x001F
7
6
5
4
3
2
1
0
R
CMD_PTR[7:2]
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-23. ADC Command Base Pointer Registers (ADCCBP_0, ADCCBP_1, ADCCBP_2))
Table 10-27. ADCCBP Field Descriptions
Field
Description
23-2
CMD_PTR [23:2]
ADC Command Base Pointer Address
— These bits define the base address of the two CSL areas inside the
system RAM or NVM of the memory map. They are used to calculate the final address from which the conversion
commands will be loaded depending on which list is active. For more details see
Section 10.5.3.2.2, “Introduction
of the two Command Sequence Lists (CSLs)
.