Chapter 15 Liquid Crystal Display (LCD40F4BV3) Block Description
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
572
Freescale Semiconductor
15.2
External Signal Description
The LCD40F4BV3 module has a total of 45 external pins.
15.2.1
BP[3:0] — Analog Backplane Pins
This output signal vector represents the analog backplane waveforms of the LCD40F4BV3 module and is
connected directly to the corresponding pads.
15.2.2
FP[39:0] — Analog Frontplane Pins
This output signal vector represents the analog frontplane waveforms of the LCD40F4BV3 module and is
connected directly to the corresponding pads.
15.2.3
VLCD — LCD Supply Voltage Pin
Positive supply voltage for the LCD waveform generation.
15.3
Memory Map and Register Definition
This section provides a detailed description of all memory and registers.
15.3.1
Module Memory Map
The memory map for the LCD40F4BV3 module is given in
. The address listed for each register
is the address offset. The total address for each register is the sum of the base address for the
LCD40F4BV3 module and the address offset for each register.
Table 15-2. Signal Properties
Name
Port
Function
Reset State
4 backplane waveforms
BP[3:0] Backplane waveform signals
that connect directly to the pads
High impedance
40 frontplane waveforms
FP[39:0] Frontplane waveform signals
that connect directly to the pads
High impedance
LCD voltage
VLCD
LCD supply voltage
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