Freescale Semiconductor MC9S12ZVHL32, Reference Manual

Page: 812 / 874

Appendix I VREG Electrical Specifications
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
812 Freescale Semiconductor
NOTE
The LVR monitors the voltages VDD, VDDF and VDDX. If the voltage
drops on these supplies to a level which could prohibit the correct function
(e.g. code execution) of the microcontroller, the LVR triggers.
13 P Base Current For External PNP(VDDX) I
BCTL
1.5 — — mA
14a D Startup from Reset (normal mode) n
STARTUP
396 — 504 t
bus
14b D Startup from Reset (special mode) n
STARTUP
555 — 555 t
bus
15 D Recover time from STOP t
STP_REC
— 23 —

s
1. For the given maximum load currents and V
SUP
input voltages, the MCU will stay out of reset.
2. Load current without the use of external PNP transistor
3. Please note that the core current is derived from VDDX
4. LVI is monitored on the VDDA supply domain
5. LVRX is monitored on the VDDX supply domain only active during full performance mode. During reduced performance mode
(stopmode) voltage supervision is solely performed by the POR block monitoring core VDD.
6. The ACLK trimming must be set that the minimum period equals to 0.2ms
7. CPMUHTTR=0x88
Table I-1. Voltage Regulator Electrical Characteristics
-40
o
C <= TJ <= 150
o
C unless noted otherwise, VDDA, VDDM and VDDX must be shorted on the application board.
Num C Characteristic Symbol Min Typical Max Unit