Chapter 21 64 KB Flash Module (S12ZFTMRZ64K2KV2)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
728
Freescale Semiconductor
The erase-all function requires the clock divider register FCLKDIV (see
before invoking this function using
soc_erase_all_req
input pin. Please refer to the Reference Manual for
information about the default value of FCLKDIV in case direct writes to register FCLKDIV are not
allowed by the time this feature is invoked. If FCLKDIV is not properly set the erase-all operation will not
execute and the ACCERR flag in FSTAT register will set. After the execution of the erase-all function the
FCLKDIV register will be reset and the value of register FCLKDIV must be loaded before launching any
other command afterwards.
Before invoking the erase-all function using the
soc_erase_all_req
pin, the ACCERR and FPVIOL flags
in the FSTAT register must be clear. When invoked from
soc_erase_all_req
the erase-all function will
erase all P-Flash memory and EEPROM memory space regardless of the protection settings. If the post-
erase verify passes, the routine will then release security by setting the SEC field of the FSEC register to
the unsecure state (see
). The security byte in the Flash Configuration Field will be
programmed to the unsecure state (see
). The status of the erase-all request is reflected in the
ERSAREQ bit in the FCNFG register (see
). The ERSAREQ bit in FCNFG will be cleared
once the operation has completed and the normal FSTAT error reporting will be available as described
in
.
At the end of the erase-all sequence Protection will remain configured as it was before executing the erase-
all function. If the application requires programming P-Flash and/or EEPROM after the erase-all function
completes, the existing protection limits must be taken into account. If protection needs to be disabled the
user may need to reset the system right after completing the erase-all function.
21.4.7.8
Erase Flash Block Command
The Erase Flash Block operation will erase all addresses in a P-Flash or EEPROM block.
Upon clearing CCIF to launch the Erase Flash Block command, the Memory Controller will erase the
selected Flash block and verify that it is erased. The CCIF flag will set after the Erase Flash Block
operation has completed.
Table 21-47. Erase All Pin Error Handling
Register
Error Bit
Error Condition
FSTAT
ACCERR
Set if command not available in current mode (see
)
MGSTAT1
Set if any errors have been encountered during the erase verify operation, or
during the program verify operation
MGSTAT0
Set if any non-correctable errors have been encountered during the erase verify
operation, or during the program verify operation
Table 21-48. Erase Flash Block Command FCCOB Requirements
Register
FCCOB Parameters
FCCOB0
0x09
Global address [23:16] to
identify Flash block
FCCOB1
Global address [15:0] in Flash block to be erased