Chapter 23 LIN Physical Layer (S12LINPHYV2)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor
759
23.3.2.2
LIN Control Register (LPCR)
Table 23-3. LPCR Field Description
Module Base + Address 0x0001
Access: User read/write
(1)
1. Read: Anytime
Write: Anytime,
7
6
5
4
3
2
1
0
R
0
0
0
0
LPE
RXONLY
LPWUE
LPPUE
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented
Figure 23-4. LIN Control Register (LPCR)
Field
Description
3
LPE
LIN Enable Bit
— If set, this bit enables the LIN Physical Layer.
0 The LIN Physical Layer is in shutdown mode. None of the LIN Physical Layer functions are available, except
that the bus line is held in its recessive state by a high ohmic
(
330k
)
resistor. All registers are normally
accessible.
1 The LIN Physical Layer is not in shutdown mode.
2
RXONLY
Receive Only Mode bit
— This bit controls RXONLY mode.
0 The LIN Physical Layer is not in receive only mode.
1 The LIN Physical Layer is in receive only mode.
1
LPWUE
LIN Wake-Up Enable
— This bit controls the wake-up feature in standby mode.
0 In standby mode the wake-up feature is disabled.
1 In standby mode the wake-up feature is enabled.
0
LPPUE
LIN Pullup Resistor Enable
— Selects pullup resistor.
0 The pullup resistor is high ohmic
(
330 k
)
.
1 The 34 k
pullup is switched on (except if LPE=0 or when in standby mode with LPWUE=0)