S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor
71
Chapter 2
Port Integration Module (S12ZVHYPIMV1)
Revision History
2.1
Introduction
2.1.1
Overview
The MC9S12ZVHY/MC9S12ZVHL Families port integration module establishes the interface between
the peripheral modules and the I/O pins for all ports. It controls the electrical pin properties as well as the
signal prioritization and multiplexing on shared pins.
This document covers:
•
8-pin port A associated with the LCD FP[7:0] and rerouting of PWM0, PWM2, PWM4, PWM6
channels and rerouting of IIC
•
4-pin port B associated with the LCD BP[3:0]
•
8-pin port C associated with TIM0_IOC[7:4], MSCAN0, SCI1, SSG0 and LINPHY0’s
LPTXD0&LPRXD0
•
8-pin port D associated with LCD FP[15:8]
•
4-pin port E associated with the external 4-16MHZ oscillator and 32.768KHZ oscillator
•
8-pin port F associated with LCD FP[23:16]
•
8-pin port G associated with LCD FP[31:24]
•
8-pin port H associated with LCD FP[39:32]
•
4-pin Port J
•
8-pin port P associated with 8 PWM channels; associated with the rerouting SCI1 function also.
Rev. No.
(Item No.)
Date (Submitted
By)
Sections
Affected
Substantial Change(s)
V0.01
Mar 2012
• Initial Version
V0.02
Mar 2012
• fix typos
V0.04
Oct 2012
• fix typos, add XIRQ function explain
V0.05
Jan 2014
• add the ZVHL LINPHY related function
