Freescale Semiconductor MC9S12ZVHL32, Reference Manual

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S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor 115
Chapter 3
Memory Mapping Control (S12ZMMCV1)
Table 3-1. Revision History
3.1 Introduction
The S12ZMMC module controls the access to all internal memories and peripherals for the S12ZCPU, and
the S12ZBDC module. It also provides dirct memory access for the ADC module. The S12ZMMC
determines the address mapping of the on-chip resources, regulates access priorities and enforces memory
protection.
Figure 3-1 shows a block diagram of the S12ZMMC module.
Revision
Number
Revision Date
Sections
Affected
Description of Changes
V01.00 6 Mar 2012 Added footnotes to Table 3-8
V01.01 5 Apr 2012 Fixed wording
V01.02 16 May 2012 Fixed wording
V01.03 27 Jul 2012 Corrected Table 3-8
V01.04 27 Jul 2012 Added feature tags
V01.05 6 Aug 2012 Fixed wording
V01.06 12 Feb 2013
Figure 3-8
3.3.2.2/3-120
• Changed “KByte:to “KB”
• Corrected the description of the MMCECH/L register
•
V01.07 3 May 2013
• Fixed typos
• Removed PTU references