Chapter 10 Analog-to-Digital Converter (ADC12B_LBA_V1)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
402
Freescale Semiconductor
10.5.3.2.3
Introduction of the two Result Value Lists (RVLs)
The same list-based architecture as described above for the CSL has been implemented for the Result
Value List (RVL) with corresponding address registers (ADCRBP, ADCCROFF_0/1, ADCRIDX).
The final address for conversion result storage is calculated by the sum of these registers (e.g.:
ADCADCRIDX or ADCADCRIDX).
The RVL_BMOD bit selects if the RVL is used in double buffer or single buffer mode. In double buffer
mode the RVL is swapped:
•
Each time an “End Of List” command type got executed followed by the first conversion from top
of the next CSL and related (first) result is about to be stored
•
A CSL got aborted (bit SEQA=1’b1) and ADC enters idle state (becomes ready for new flow
control events)
Using the RVL in double buffer mode the RVL is not swapped after exit from Stop Mode or Wait Mode
with bit SWAI set. Hence the RVL used before entry of Stop or Wait Mode with bit SWAI set is overwritten
after exit from the MCU Operating Mode (see also
Section 10.2.1.2, “MCU Operating Modes
).
Which list is actively used for the ADC conversion result storage is indicated by bit RVL_SEL. The
register to define the RVL start addresses (ADCRBP) can be set to any even location of the system RAM
area. It is the user’s responsibility to make sure that the different ADC lists do not overlap or exceed the
system RAM area. The error flag IA_EIF will be set for accesses to ranges outside system RAM area and
cause an error interrupt if enabled.
Figure 10-33. Result Value List Schema in Double Buffer Mode
Memory Map
0x00_0000
Register Space
RAM Space
RAM start address
RAM end address
RVL_0
(active)
(ADCCROFF_0)
RVL_1
(alternative)
(ADCCROFF_1)
(ADC
(ADC
Scenario with: RVL_SEL = 1’b0
Memory Map
0x00_0000
Register Space
RAM Space
RAM start address
RAM end address
RVL_1
(active)
(ADCCROFF_0)
RVL_0
(alternative)
(ADCCROFF_1)
(ADC
(ADC
Scenario with: RVL_SEL = 1’b1
ADCRIDX(max))
ADCRIDX(max))
ADCRIDX(max))
ADCRIDX(max))
Note:
Address register names in () are not absolute addresses instead they are a sample offset or sample index
