Chapter 5 Background Debug Controller (S12ZBDCV2)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
176
Freescale Semiconductor
Figure 5-11. ACK Abort Procedure at the Command Level (Not To Scale)
shows a conflict between the ACK pulse and the SYNC request pulse. The target is executing
a pending BDC command at the exact moment the host is being connected to the BKGD pin. In this case,
an ACK pulse is issued simultaneously to the SYNC command. Thus there is an electrical conflict between
the ACK speedup pulse and the SYNC pulse. As this is not a probable situation, the protocol does not
prevent this conflict from happening.
Figure 5-12. ACK Pulse and SYNC Request Conflict
5.4.9
Hardware Handshake Disabled (ACK Pulse Disabled)
The default state of the BDC after reset is hardware handshake protocol disabled. It can also be disabled
by the ACK_DISABLE BDC command. This provides backwards compatibility with the existing host
devices which are not able to execute the hardware handshake protocol. For host devices that support the
hardware handshake protocol, true non-intrusive debugging and error flagging is offered.
If the ACK pulse protocol is disabled, the host needs to use the worst case delay time at the appropriate
places in the protocol.
READ_MEM.B
READ_BDCCSR
BKGD PIN
ADDRESS[23-0]
HOST TARGET
BDC DECODES
READ_MEM.B CMD
IS ABORTED BY THE SYNC REQUEST
NEW BDC COMMAND
AND TRYS TO EXECUTE
HOST TARGET
HOST TARGET
SYNC RESPONSE
FROM THE TARGET
NEW BDC COMMAND
(NOT TO SCALE)
(NOT TO SCALE)
BDCSI clock
(TARGET MCU)
TARGET MCU
DRIVES TO
BKGD PIN
BKGD PIN
16 CYCLES
SPEEDUP PULSE
HIGH-IMPEDANCE
HOST
DRIVES SYNC
TO BKGD PIN
HOST AND TARGET
ACK PULSE
HOST SYNC REQUEST PULSE
AT LEAST 128 CYCLES
ELECTRICAL CONFLICT
DRIVE TO BKGD PIN
