Freescale Semiconductor MC9S12ZVHL32, Reference Manual

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Chapter 2 Port Integration Module (S12ZVHYPIMV1)
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
Freescale Semiconductor 93
2.3.2.4 Module Routing Register 3 (MODRR3)
1
1. This register is only avaiable on ZVHL
Address 0x0200 Access: User read/write
(1)
1. Read: Anytime
Write: Once in normal, anytime in special mode
7 6 5 4 3 2 1 0
R 0 0 0 0 0
S0L0RR2-0
W
— — — — — SCI0-LINPHY0 (see Figure 2-5 )
Reset 0 0 0 0 0 0 0 0
Figure 2-4. Module Routing Register 3 (MODRR3)
Field Description
2-0
S0L0RR2-0
Module Routing Register — SCI0-LINPHY0 routing
Selection of SCI0-LINPHY0 interface routing options to support probing and conformance testing. Refer to
Figure 2-5 for an illustration and Table 2-5 for preferred settings. SCI0 must be enabled for TXD0 routing to take
effect on pins. LINPHY0 must be enabled for LPRXD0 and LPDC0 routings to take effect on pins.